> I can't find any problems with tracing traps in Steem v2.4. I > did find however that you can trace line a and f exceptions, that certainly > is wrong. This is what Steem v2.4 is doing when tracing traps: > > 1: Set trace bit. > 2: trap #?. > <Trap exception happens> - Jump to vector, trace bit cleared, stacked sr has > trace bit set. > <Trace exception happens> - Jump to vector, stacked sr has trace bit clear. > 3: Trace routine. > > I've tested it on my STE and it seems to be doing the same thing. The trace > exception is generated, the stacked pc is the first instruction of the trap > routine and the trace bit is clear in the stacked sr. Of course trapv, div0 > and chk should all do the same thing, they don't on v2.4. Correct in all respects. Sorry to mess you about! Merry Xmas Stephen -- Steem - http://www.blimey.strayduck.com/ Manage your list membership - //www.freelists.org/ Click here to unsubscribe - mailto:steem-request@xxxxxxxxxxxxx?subject=unsubscribe