[sprdlinux] Re: Help with spreadtrum kernel
- From: Abhishek Goyal <abgoyal@xxxxxxxxx>
- To: Lyra Zhang <zhang.lyra@xxxxxxxxx>
- Date: Fri, 20 Feb 2015 20:00:18 +0530
Thanks Lyra. Sorry for late reply, I was travelling since sunday and have
just returned.
If I see kernel/drivers/video/spreadtrum/lcdpanel.c (attached), the
settings seem correct. The only thing I can thing of is maybe the LCD panel
is connected by Zen on CS=1 rather than CS=0 and thats why this is
happening. I will try and write back.
One more thing:
I was trying to read the register settings in the factory kernel by
mmap-ing the register area. The MMAP call succeeds, but then I can't read
from the mapped area - the phone hangs! Does anyone have any idea why that
would happen?
On Sun, Feb 15, 2015 at 2:55 PM, Lyra Zhang <zhang.lyra@xxxxxxxxx> wrote:
> Hi, G2
>
> I've looked through the manual, there is a LCM_CTRL register whose
> offset is 0x0180, hope that it can help you.
>
> bit[5:4] Panel pixel data bit width for LCM0, reset value is 2'h0
> 0 - 16bits
> 1 - 18bits
> 2 - 24bits
>
> bit[3:1] LCM interface bus width for LCM0, reset value is 3'h0
> 0 - 8bits
> 1 - 9bits
> 2 - 16bits
> 3 - 18bits
> 4 - 24bits
>
> the same to bit[13:12] & bit[11:9] for LCM1
>
> Best regards,
> Chunyan
>
> On Sat, Feb 14, 2015 at 2:13 AM, Abhishek Goyal <abgoyal@xxxxxxxxx> wrote:
> > I am attaching the driver I have been using and the data sheet for
> ili9481.
> > I already tried bus_width = 8 and bus_width = 16.
> >
> > If I set bus_width = 8, then the LCD does not get configured properly
> and I
> > can see timeout errors in /proc/kmsg.
> > If i set bus_width = 16, the lcd works, but as I showed you, it only sees
> > half the pixels.
> >
> > I can't find anything in the LCD module manual that allows me to set the
> > correct bus width in the LCD module configuration. If you look at the
> manual
> > I have attached, page 8, IM[2:0] hardware pins control the bus width. So
> bus
> > width for the LCD is configured by connection these three pins, which Zen
> > would have done. Then pixel format which is 565, is set in one of the
> > registers.
> >
> > But how to tell the sp6821 DMA to do 8-bit writes instead of 16 bit
> writes.
> > There must be something in the LCDC_CTRL which allows us to do that.
> >
> > See if you can spot something in the driver/manual.
> >
> >
> >
> >
> >
> > On Fri, Feb 13, 2015 at 11:33 PM, Orson Zhai <orsonzhai@xxxxxxxxx>
> wrote:
> >>
> >>
> >> On 2015年02月14日 02:01, Orson Zhai wrote:
> >>>
> >>>
> >>> On 2015年02月14日 01:42, Abhishek Goyal wrote:
> >>>>
> >>>> On Fri, Feb 13, 2015 at 10:59 PM, Orson Zhai <orsonzhai@xxxxxxxxx>
> >>>> wrote:
> >>>>
> >>>>> I am think one possible case is Zen might change the LCD panel data
> >>>>> width
> >>>>> to 8bit for transferring 16bit color.
> >>>>> Then in normal, lcd driver should write twice for 1 pixel ---- 1st
> time
> >>>>> for lower 8 bits and 2nd time for higher 8bit.
> >>>>> But the driver we used is ili9684 which is still think LCD panel is
> >>>>> with
> >>>>> 16bits width.
> >>>>> And the driver copies 16bit as 1 pixel to LCD interface.
> >>>>> Then, the higher byte (0xff) is ignored by lcd data bus and only the
> >>>>> lower
> >>>>> byte gets into panel.
> >>>>> So , if we tell lcd controller " hey, the LCD interface is 8bit
> width,
> >>>>> pls
> >>>>> take 16 bits color for 8bit x 2" everything maybe ok.
> >>>>
> >>>>
> >>>>
> >>>> Yes - exactly. Now, from reading the sprd source code, what I have
> >>>> understood (I could be wrong) is the way the LCDC controller works is:
> >>>>
> >>>> 1. You write the PHYSICAL address of frambuffer to LCDC_OSD1_BASE_ADDR
> >>>> and
> >>>> other OSD1 configuration:
> >>>>
> >>>> from kernel/drivers/video/spreadtrum/lcdc.c
> >>>>
> >>>> uint32_t base = fb->fix.smem_start +
> fb->fix.line_length
> >>>> *
> >>>> fb->var.yoffset;
> >>>> <...>
> >>>>
> >>>> uint32_t size = (fb->var.xres & 0xffff) |
> >>>> ((fb->var.yres)
> >>>> << 16);
> >>>>
> >>>> lcdc_write(base, LCDC_OSD1_BASE_ADDR);
> >>>> lcdc_write(0, LCDC_OSD1_DISP_XY);
> >>>> lcdc_write(size,LCDC_OSD1_SIZE_XY);
> >>>> lcdc_write(fb->var.xres, LCDC_OSD1_PITCH);
> >>>>
> >>>> lcdc_write(size, LCDC_DISP_SIZE);
> >>>>
> >>>> And then when you do:
> >>>>
> >>>> lcdc_set_bits((1 << 3), LCDC_CTRL);
> >>>>
> >>>>
> >>>> The LCD controller in the 6821 does DMA of frame buffer datafrom
> >>>> LCDC_OSD1_BASE_ADDR to the LCD module bus.
> >>>>
> >>>> So something in the LCDC_CTRL or LCM_CTRL or LCDC_OSD1_CTRL is
> >>>> misconfigured - it needs to be told that the bus width is only 8 bits.
> >>>>
> >>>> Now I tried to set the bus_width = 8 in the ili9481 driver itself, it
> >>>> made
> >>>> the display not work. Nothing showed up on screen and there were
> various
> >>>> timeouts on /proc/kmsg.
> >>>>
> >>>
> >>> I am looking at the code in ili9684.c:
> >>
> >>
> >> typo, should be ili9486.c
> >>>
> >>>
> >>> static struct info_mcu lcd_ili9486_info = {
> >>> .bus_mode = LCD_BUS_8080,
> >>> .bus_width = 18, ^^^^^^^^^^^^^^^^
> >>> .bpp = 18, /*RGB88*/ ^^^^^^^^^^^^^^^^
> >>> .timing = &lcd_ili9486_timing,
> >>> .ops = NULL,
> >>> };
> >>> if changes to:
> >>> .bus_width = 8,
> >>> .bpp = 16, /*RGB565*/ the driver will auto config the registers? i have
> >>> attached an ili9684.c which is sent from some guys this evening.
> >>
> >>
> >> ili9486.c
> >>>
> >>>
> >>>
> >>>
> >>
> >>
> >
> >
> >
> > --
> > Take the carbon, leave the bible
> >
>
--
Take the carbon, leave the bible
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