Consider the following stackup: L1 - Signal L2 - GND L3 - PWR L4 - Signal For signals transitioning from L1 to L4 a stitching capacitor may be needed to provide a return path. If the signal rise time is slow (say greater than 5 ns) can the stitching capacitor be located further from the signal via? Is there a relationship between rise time and distance from via to cap that is effective? Is there a case where the stitching capacitors are not needed if the signal is rise time is slow enough? If so, where does the current return go and why is it not a problem? Thanks - Joel ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu