[SI-LIST] Re: question about voltage dividers
- From: wolfgang.maichen@xxxxxxxxxxxx
- To: "Doug Brooks" <dbrooks7@xxxxxxxxxx>
- Date: Wed, 4 Mar 2009 09:41:28 -0800
As a small refinement to below considerations - the effective (Thevenin)
output impedance of a voltage divider is
1/Rout = 1/R1 + 1/R2,
i.e. the load sees the two resistors of the divider in parallel as far as
source impedance is concerned. (this formula assumes the impedance of the
source driving the divider is much smaller that R1+R2). So a divider
consisting of 1k + 1k has an impedance of 500 Ohm feeding the load. This
impedance then should be much smaller than the load's input impedance
(Doug's 100x is about the right ballpark if you want accuracy of around
1%; in many cases - e.g. termination or threshold voltages - it's often
possible to loosen the requirement to e.g. 5 or 10%, so around 10x is
sufficient in that case).
Another consideration can be power consumption - if the divider is used to
generate a bias or threshold voltage, with the divider sitting between Vcc
and GND, then the shunt current through the divider is effectively wasted.
Larger resistance values help in that case. Of course that only works if
the divider doesn't have the additional task of providing signal
termination and needs to have e.g. 50 Ohm Thevenin resistance (like in the
case of some PECL termination schemes).
Wolfgang
"Doug Brooks" <dbrooks7@xxxxxxxxxx>
Sent by: si-list-bounce@xxxxxxxxxxxxx
03/04/2009 09:10 AM
To
"Roy M" <roymesi@xxxxxxxxx>
cc
si-list@xxxxxxxxxxxxx
Subject
[SI-LIST] Re: question about voltage dividers
In the GENERAL CASE, the answer is pretty straightforward. When you say
that the *ratio* is the determining factor, you are making two implicit
assumptions:
1. The resistor divider is not loading down the driver circuit, and
2. The load is not loading down the resistor divider.
For the first assumption to be true, R1+R2 must be greater that about 100X
the Zout of the driver, or R1+R2>100*Zout (Some will quibble over whether
100X is the right number!!)
For the second assumption, the "bottom" resistor, R1 or R2, must be less
than about one percent of the input impedance of the next stage, i.e.
Zin>100*(R1 or R2).
IN GENERAL, any set of values for the voltage divider that meet these two
assumptions are fine.
There may be SPECIFIC cases that limit the R values. Some possible
examples:
a. If the Zin is *so* high that parasitics might come into play
b. If the frequencies are *so* high that parastics may come into play (or
SI issues effect the selection)
c. Noise issues are *so* extreme that special materials might be used
d. Power requirements are *so* extreme that power must be minimized at all
costs....... (etc.)
But these SPECIAL cases do not change the GENERAL case, only possibly put
boundaries around it.
(My book has a section specifically devoted to resistive voltage dividers.
Doug Brooks
http://www.ultracad.com
> HI,
> I have a general, rather basic, question concerning voltage dividers.
> We all know that when it comes to voltage dividers, the *ratio* between
> the
> resistors is what matters to the Vout value, and not the resistors'
> *value*itself.
> But if I know for instance, that the ratio is 1:3 (i.e, R1=3*R2), so I
can
> choose R1 to be 3k and R2 to be 1k, OR I can choose R1=3000k and
R2=1000K
> or
> (well, you got my idea...).
> Now, I understand that a very low value means high power (cause there's
> alot
> of current going to gnd) but what if I choose very high value? (like 1M
> and
> 3M),. it doesn't sounds good, but I can't explain why..
> Help anyone???
> Thanks,
> Roy
>
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