[SI-LIST] Re: power plane spacing
- From: Bernard Voss <bjvoss@xxxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Thu, 12 Jul 2001 10:26:49 -0700
Dorin,
I have not tried to use the exact solution you propose, however I have
achieved low
power supply noise and acceptable EMI profiles on several large cards
containing multiple
split rail VLSI devices, basically 1.8V and 2.5V local core supplies sharing
the same split
power distribution plane with the following stackup configuration without
controlling the
split plane polygon edge to edge spacing which turns out to vary from as little
as 0.010"
to as great as 0.100".
__ Microstrip signals
_____ Ground Plane
__ Stripline Signal
_____ Ground Plane
__ __ Split 1.8v, 2.5v Core Power Plane
_____ 3.3v I/O Power Plane
_____ Ground Plane
__ Stripline Signal
_____ Ground Plane
__ Microstrip Signal
I position the split and non-split power planes between a pair of ground
planes to
eliminate the issues routing signals across a split on a directly adjacent
layer can cause
and further reduce EMI risks from overall power plane radiation. I used a small
distance
between the power plane polygons and their directly adjacent ground plane
(0.0035" to
0.005") and a minimum split plane edge to edge spacing of ~0.010" but this
distance varies
to as great as 0.100" in places. The distance between the two power plane
layers in the
center of the stackup was adjusted to meet the overall card target finished
thickness of
0.093".
Bernard
DORIN OPREA wrote:
> Thanks for all the thoughts shared through this chain of emails.
> The issue is the spacing between the islands within the same copper layer (not
> vertical spacing). A small spacing is also very convenient for routing on the
> adjacent
> signal layers (dual strip line configuration).
> >From the PCB manufacturing point of view the spacing should be >= 5 mils (1
> >oz. copper
> plane). The vertical spacing between power and ground layers is > 4.5 mils.
> The question is whether is this a good solution to go ? Are there any
> worries about ?
>
> Thanks,
> Dorin
>
> e wrote:
>
> > Steve,
> >
> > Please see my response below:
> >
> > "S. Weir" wrote:
> >
> > > Ellis,
> > >
> > > I guess Dorin should reply, but I don't think his question was about
> > > vertical spacing,
> >
> > I didn't think it was, I did not mean to imply it, and if I did, I
> > apologize, I
> > should be more clear. I will work on it.
> >
> > Ellis
> >
> > > it was how wide to make the gap between the islands on
> > > the split plane layer. The concern was that a wide gap would lead to an
> > > EMI problem, whereas a small gap would couple noise from one plane to the
> > > other along the edges.
> > >
> >
> > This is my understanding also.
> >
> > Ellis
> >
> > >
> > > An integration of the capacitance along the edge shows that it is very
> > > very
> > > small compared to the plane capacitance, unless the islands are very long
> > > and very narrow, ie traces. Consequently, the plane to ground impedance
> > > of
> > > each plane is much lower than the split plane to split plane
> > > capacitance. Let me put it another way, the best coupling we can
> > > typically get on a differential pair is 10-15%. Two adjacent plane
> > > islands
> > > will have orders of magnitude weaker coupling.
> > >
> >
> > I believe this is what I stated, though in more simple terms and with much
> > less
> > detail. Nonetheless, the point is the same. I just imagined the 'noise'
> > looking
> > across at the edge of the adjacent plane, and then down at the ground.
> > There is
> > just so much more 'visible' area to ground, and with typical FR-4
> > power/ground
> > spacing of 3-5 mil, the ground is also much closer => much more capacitance
> > =>
> > much less impedance. Of course, integration works, too. No doubt it would
> > have
> > been beneficial to work the math, but this is a good first step (in the
> > right
> > direction I hope), and at originally I thought it was enough to convey the
> > idea
> > without cluterring it with (necessary) details.
> >
> > I would have liked to get feedback from you on the stackup I proposed. If
> > there
> > is anything lacking about it I would like to know what it is (they are)
> > before I
> > use this stackup in my next project. I don't remember anything that was
> > ever
> > proposed in this group that was not criticized -- and I think that is a good
> > thing.
> >
> > One thing that was not addressed here is crosstalk. While shielding may
> > reduce
> > EMI problems, it does nothing to prevent signal integrity degradation to
> > nearby
> > signals within the shields, due to the radiating fields that were causing
> > the EMI
> > problems.
> >
> > Regards,
> > Ellis
> >
> > >
> > > Regards,
> > >
> > > Steve.
> > > At 09:41 PM 7/11/01 -0700, you wrote:
> > >
> > > >Dorin,
> > > >
> > > >I suppose if noise from an adjacent power partition reaches the plane
> > > >split,
> > > >it would see a lower impedance to ground via plane capacitance (assuming
> > > >your power planes are tightly coupled with ground planes) than to the
> > > >other
> > > >adjacent power plane, and so it would take that path to ground.
> > > >
> > > >One limit I can think of to how small the split should be (with an eye on
> > > >the power-ground spacing) is manufacturability. Sensitive analog
> > > >supplies
> > > >do require special considerations, but it does not seem like this
> > > >applies in
> > > >your case.
> > > >
> > > >I can imagine if ground currents were circulating that they could cause
> > > >radiation to 'leak' out where where there is a split, but then I'm no
> > > >expert
> > > >like most of the people here are (and I'm always imagining things
> > > >anyway).
> > > >Whether valid or not, consider this stackup:
> > > >
> > > > signal --
> > > > solid ground ----------
> > > > signal --
> > > > signal -- <= be careful routing over
> > > > split
> > > >
> > > > broken plane ---- -----
> > > > solid ground -----------
> > > > signal --
> > > > signal --
> > > > solid ground ----------
> > > > broken plane ---- ----
> > > > signal -- <= be careful routing over
> > > >split
> > > > signal --
> > > > solid ground ------------
> > > > signal --
> > > >
> > > >The outer ground layers should prevent any 'leaks'.
> > > >
> > > >Ellis
> > > >
> > > >
> > > >
> > > >DORIN OPREA wrote:
> > > >
> > > > > Hi everyone,
> > > > >
> > > > > In high speed design we often use the split planes on a power layer.
> > > > > The
> > > > > spacing between the digital planes is correlated with the distance
> > > > > between the power layer to the ground layer. In general we have 50 mil
> > > > > spacing. It just happen to run into a different opinion which
> > > > > recommends
> > > > > a very small spacing due to the slot antenna effect (the gap between
> > > > > the
> > > > > planes) that allows the eddy currents to radiate. A small spacing may
> > > > > couple noise into the low power supply (1.5V or 1.8V).
> > > > > How critical is this radiation effect versus noise coupling between
> > > > > the
> > > > > two power distribution systems ?
> > > > > What is the practice out there ?
> > > > >
> > > > > Thanks very much for you guys always being there,
> > > > > Dorin
> > > > >
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--
Bernard Voss
Principal Interconnect Specialist
SiQual, Signal Quality Engineering
18735 SW Boones Ferry Road
Tualatin, OR 97062-3090
(503) 885-1231
http://www.siqual.com
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