[SI-LIST] Re: equal length requirement for SDRAM signals
- From: "Loyer, Jeff" <jeff.loyer@xxxxxxxxx>
- To: "Hermann.Ruckerbauer@xxxxxxxxxxxxx" <Hermann.Ruckerbauer@xxxxxxxxxxxxx>, "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
- Date: Tue, 22 Jan 2013 15:29:42 +0000
Hello Herman,
This sentence took me very much by surprise. Can you share specifics on how
this could happen?
"I have seen Designs being killed by over-accurate length matching"
Thanks,
Jeff Loyer
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Hermann Ruckerbauer
Sent: Tuesday, January 22, 2013 12:58 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: equal length requirement for SDRAM signals
Hello Leon,
For SSO (Simultanious switching outputs) this does not help, as they will be
aligned to the DQS anyhow.
For the input noise on DQ this might improve situation a little bit for VDDQ
noise, but I don't think you have so much margin that this really changes a
lot. Of course this depends on your system speed, but usually timing margins
are tight and you don't want to loose too much timing margin.
On CA usually you do have a VTT plane which should not impact e. g. VDDQ too
much from a noise point of view. So also here I expect that you loose more
margin when doing non equal routing vs. SSN noise.
==> My expectation is, that with the small Window that you can use to optimize
SSN you will not really gain anything from a noise point of view, but you will
loose timing margin.
==> I would not recommend to do it and stay with a reasonable length matching
accuracy.
Hermann
P.S. but I have seen Designs being killed by over-accurate length matching ..
Sometimes a not so perfect matching is better than a very tight matching, but
this depends on your system.
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schrieb 李磊:
> hi, experts,
> in many vendors' SDRAM layout guide line, there is equal length requirement
> for SDRAM group signals. in order to meet this, we use snake lines to reach
> this target usually.
> in my understanding, this kind of requirement is just only from electrical
> timing point of view.
> Actually from SSN point of view, different signal length should have benefit
> on the contrary.
> so as long as signal timing constraint is not violated, it's better to make
> signal length unequal.
>
> Am I right?
>
> thanks.
> BR,Leon
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