[SI-LIST] Re: controlled impedance requirements
- From: "Don Sionne" <don@xxxxxxxxxxxxxxxxxxx>
- To: <kobik@xxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Mon, 17 Jan 2005 09:18:39 -0800
Kobi,
Just define the impedance value and tolerance for those controlled layers,
specify the dielectric choice (Fr-4, Getek, Rogers, etc.) and copper weight
and let the fabricator determine the correct stack-up. The trace width
should be defined by the gerber data. Please note, depending on your
supplier, they may take license to modify the copper weight and trace width
by up to 20%, this can be a huge variable, so if there are other constraints
like DC line resistance, please keep this in mind or note it in your fab
drawing. We determine the proper construction base on the physical
attributes of the resultant trace, dielectric yields and Dk as defined by
our process. Depending on the equipment and process chemistry used, there
will be slight differences between fabricators. You can always request a
proposed stack-up from your supplier so you can verify the construction. As
long as you don't abuse this request, most should accommodate. A 10%
impedance tolerance is a reasonable requirement, which you will not be
charged extra. Externally, impedances are a bit harder to control because we
use an additive plating process to define the circuit, so, as long as there
are no isolated features this should not be a problem.
Best regards,
Don Sionne
Account Manager
don@xxxxxxxxxxxxxxxxxxx
Gorilla Circuits, Inc.
1497 Berger Drive
San Jose, CA 95112
Phone: 408.294.9897 ex:122
Fax: 408.297.1540
Cell: 408.807.8950
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]On
Behalf Of kobik74
Sent: Monday, January 17, 2005 1:38 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] controlled impedance requirements
Hi gurus
How do you specify to the PCB manufacturer the controlled impedance
requirements
Except the layer stack up, layer thickness (oz), board thickness and
text that define the controlled impedance for signals in each layer
do you also define the PCB material type (Er, Silkscreen, Solder
=85), inner dielectric thickness or you trust the manufacturer to
reach the controlled impedance?
How much tolerance do you permit?
Thanks in advance
Kobi
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