Hello, guess this is not completely possible.. For writing the Controller can do the inversion and write Data inverted with low SSN .. on the reads the DRAM write back data as given. But after a read the controller will not know if the data have been written inverted or normal .. Assuming you are happy with a statistical reduced impact of SSN it might be possible with some limitations.. First of all the following is only valid - only inside one burst (not between bursts) and - and only for Writes SSN reduction (For Reads only if you limit the Read Start address of a burst). For CA0-CA2 always the same addresses are Written/Read to/from the DRAM (with the impact that the order of the bits changes based on the setting "interleaved" vs. "sequential") For a Write the DRAM stores the data as sent by the Controller (some inverted, some not) For a read with any specific CA0 to CA2 you will get data back in a different order than sent ("interleaved" vs. "sequential"). So for reads the action taken by the controller will not help any more. (only if you limit the accesses to start at 000 (for CA0-CA2) the order of the bits is the same for reads as for writes and would help also to reduce SSN for Reads) Now the controller needs to re-order the bits to the original sent order, and based on this order he should be able to regonice if he would have sent the datbits inverted or not. Guess this could work inside one Burst, but the first bit in the burst needs always sent normal (not-inverted) to have a defined starting point. So if you run seamless bursts you would not have SSN reduction between the last bit of one burst and the first bit of the next burst. Disclaimer: This is just based on 10 minutes thinking during writing the answer, so I might have overlooked something or maybe even the recalculation of inverted or not-inverted might not be possible. I'm not sure if the performance impact (figuring out if data was sent inverted or not) is worth the limited improvement of this kind of implementation.. maybe it's better do do some other scrambling of the data (what I think is done anyhow by some controllers..) Hermann Upcoming Events: ================= "Open the Black Box of Memory" What you always wanted to know about Memory! .. But never had the right expert to ask! September 22./23. 2014 in Copenhagen (some seats still available) September 24./25. 2014 in Copenhagen (Sold out) vist www.EyeKnowHow.de/en/seminars/ EKH - EyeKnowHow Hermann Ruckerbauer www.EyeKnowHow.de Hermann.Ruckerbauer@xxxxxxxxxxxxx Itzlinger Strasse 21a 94469 Deggendorf Tel.: +49 (0)991 / 29 69 29 05 Mobile: +49 (0)176 / 787 787 77 Fax: +49 (0)3212 / 121 9008 Am 29.09.2014 um 10:33 schrieb Sanjay G (Redacted sender myworld_sg@xxxxxxxxx for DMARC): > Hello experts. > DDR4 has got new feature of bit-inversion to control SSN jitter > is it possible to implement bit inversion in DDR3 also through controller > software mechanism? > > Thanks > > ------------------------------------------------------------------ > To unsubscribe from si-list: > si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field > > or to administer your membership from a web page, go to: > //www.freelists.org/webpage/si-list > > For help: > si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field > > > List forum is accessible at: > http://tech.groups.yahoo.com/group/si-list > > List archives are viewable at: > //www.freelists.org/archives/si-list > > Old (prior to June 6, 2001) list archives are viewable at: > http://www.qsl.net/wb6tpu > > ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List forum is accessible at: http://tech.groups.yahoo.com/group/si-list List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu