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- » [SI-LIST] Re: understanding acceptable amount of jitter for given receiver/system - Jory McKinley
- » [SI-LIST] Has anyone Compiled a Loss-Budget List? - Bill Hargin (Nan Ya, USA)
- » [SI-LIST] Re: Has anyone Compiled a Loss-Budget List? - Bill Hargin (Nan Ya, USA)
- » [SI-LIST] options for reducing EMI - Chen, Sherman
- » [SI-LIST] My new YouTube video and GoToMeeting discussion - Doug Smith
- » [SI-LIST] Re: options for reducing EMI - steve weir
- » [SI-LIST] Re: options for reducing EMI - Shankar V
- » [SI-LIST] Need s-parameter model - bala
- » [SI-LIST] Free Signal Integrity Analysis Workshops in September from ANSYS - Margaret Schmitt
- » [SI-LIST] Default tap settings for SerDes - Mario Antolos
- » [SI-LIST] Re: Default tap settings for SerDes - steve weir
- » [SI-LIST] Caution to those who live outside of California and got there on business!!! (Don't) - Doug Smith
- » [SI-LIST] Re: Default tap settings for SerDes - Mario Antolos
- » [SI-LIST] Re: Default tap settings for SerDes - Ransom Stephens
- » [SI-LIST] Re: Caution to those who live outside of California and got there on business!!! (Don't) - Rick Collins
- » [SI-LIST] Re: Caution to those who live outside of California and got there on business!!! (Don't) - Dan Bostan
- » [SI-LIST] Re: Caution to those who live outside of California and got there on business!!! (Don't) - Dan Bostan
- » [SI-LIST] Re: Caution to those who live outside of California and got there on business!!! (Don't) - William Baldwin
- » [SI-LIST] Re: Caution to those who live outside of California and got there on business!!! (Don't) - Cheng, Chris
- » [SI-LIST] Re: SerDes Speed Limitation - icer world
- » [SI-LIST] Re: Caution to those who live outside of California and got there on business!!! (Don't) - Mike Violette
- » [SI-LIST] Re: options for reducing EMI - Chen, Sherman
- » [SI-LIST] Re: options for reducing EMI - Scott McMorrow
- » [SI-LIST] Re: options for reducing EMI - Pommerenke, David
- » [SI-LIST] Re: options for reducing EMI - steve weir
- » [SI-LIST] Re: options for reducing EMI - Rick Collins
- » [SI-LIST] Re: options for reducing EMI - steve weir
- » [SI-LIST] Re: Caution to those who live outside of California and got there on business!!! (Don't) - Zelno, John
- » [SI-LIST] Re: options for reducing EMI - Ravinder Ajmani
- » [SI-LIST] Re: options for reducing EMI - Chen, Sherman
- » [SI-LIST] Re: Caution to those who live outside of California and got there on business!!! (Don't) - Hermann Ruckerbauer
- » [SI-LIST] Re: options for reducing EMI - jackle zheng
- » [SI-LIST] timing in s-parameters - eric silist
- » [SI-LIST] Re: timing in s-parameters - Scott McMorrow
- » [SI-LIST] Re: timing in s-parameters - Muranyi, Arpad
- » [SI-LIST] Senior SI engineer and internship position available in HP Storage Division - Cheng, Chris
- » [SI-LIST] Re: timing in s-parameters - Dmitriev-Zdorov, Vladimir
- » [SI-LIST] Re: timing in s-parameters - David Vye
- » [SI-LIST] Re: timing in s-parameters - Alfred P. Neves
- » [SI-LIST] IEEE EDAPS 2014 (Bangalore) Deadline Extended to 12th Sep - Dipanjan Gope
- » [SI-LIST] Re: timing in s-parameters - Scott McMorrow
- » [SI-LIST] Re: timing in s-parameters - Alfred P. Neves
- » [SI-LIST] Re: IEEE EDAPS 2014 (Bangalore) Deadline Extended to 12th Sep - Dipanjan Gope
- » [SI-LIST] composite NTSC PAL encoder SI simulation model suggestion - Aramareddy Sreekanth reddy
- » [SI-LIST] Re: timing in s-parameters - Scott McMorrow
- » [SI-LIST] composite NTSC PAL encoder SI simulation model suggestion - Aramareddy Sreekanth reddy
- » [SI-LIST] Any SI seminars in the Bay Area - Hithesh
- » [SI-LIST] Re: Any SI seminars in the Bay Area - Mike Buetow
- » [SI-LIST] Re: Any SI seminars in the Bay Area - David Vye
- » [SI-LIST] Re: timing in s-parameters - Piero Triverio
- » [SI-LIST] Re: options for reducing EMI - Chen, Sherman
- » [SI-LIST] Re: options for reducing EMI - steve weir
- » [SI-LIST] One stitching via or more vias is better for 25Gbps application??? - Leeyuyun
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - steve weir
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - steve weir
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Leeyuyun
- » [SI-LIST] Re: options for reducing EMI - Ken Wyatt
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Leeyuyun
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Leeyuyun
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Cristian Gozzi
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Lee
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Istvan Nagy
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Hany Fahmy
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Leeyuyun
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - steve weir
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Leeyuyun
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Lee
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - steve weir
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - leeritchey@xxxxxxxxxxxxx
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Alfred Alfred
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - leeritchey@xxxxxxxxxxxxx
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - steve weir
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - steve weir
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Leeyuyun
- » [SI-LIST] Re: options for reducing EMI - Chen, Sherman
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - steve weir
- » [SI-LIST] Re: options for reducing EMI - steve weir
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Bert Simonovich
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps - David Banas
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Leeyuyun
- » [SI-LIST] One stitching via or more vias is better for 25Gbps - Eric Bogatin
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Bipin Dhavale
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Lee
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps - Lee
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - steve weir
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps - Scott McMorrow
- » [SI-LIST] free Teledyne LeCroy jitter webinar with Bogatin and Blankman Sept 9 - Eric Bogatin
- » [SI-LIST] Board design adjustments by manufacturers - Yuriy Shlepnev
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Leeyuyun
- » [SI-LIST] Re: Board design adjustments by manufacturers - Istvan Nagy
- » [SI-LIST] Re: free Teledyne LeCroy jitter webinar with Bogatin and Blankman Sept 9 - Asbenson, Lyndell L
- » [SI-LIST] Re: Board design adjustments by manufacturers - Hermann Ruckerbauer
- » [SI-LIST] Re: Board design adjustments by manufacturers - Rod CR
- » [SI-LIST] Re: Board design adjustments by manufacturers - Asbenson, Lyndell L
- » [SI-LIST] Re: Board design adjustments by manufacturers - Loyer, Jeff
- » [SI-LIST] Re: Board design adjustments by manufacturers - Yuriy Shlepnev
- » [SI-LIST] Archives for SI LIST - Anto Davis
- » [SI-LIST] Re: Archives for SI LIST - Orin Laney
- » [SI-LIST] Improving SNR in Audio signals-PCB - Saravanan Chml
- » [SI-LIST] Re: Any SI seminars in the Bay Area - heidi_barnes
- » [SI-LIST] free Keysight Technologies (formerly Agilent) Signal Integrity EDA Seminar in Santa Clara on 9/16 and 9/18 - heidi_barnes
- » [SI-LIST] Re: Any SI seminars in the Bay Area - heidi_barnes
- » [SI-LIST] EM simulation for Waterloo, Ontario RF and SI engineers - David Vye
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Hsiuan-ju Hsu
- » [SI-LIST] Re: Improving SNR in Audio signals-PCB - Chen, Sherman
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Hsiuan-ju Hsu
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Hsiuan-ju Hsu
- » [SI-LIST] Re: One stitching via or more vias is better for 25Gbps application??? - Hsiuan-ju Hsu
- » [SI-LIST] Ferrite Beads on Differential Signal Lines? - Craig Francis
- » [SI-LIST] Ferrite Beads on Differential Signal Lines? - Craig Francis
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - steve weir
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - Tesla
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - Chen, Sherman
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - steve weir
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - Orin Laney
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - Dave Cuthbert
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - Lee
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - Orin Laney
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - Rick Collins
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - billg12@xxxxxxxxxxxxx
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - Randy Dawson
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - steve weir
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - Craig Francis
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - Joel Brown
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - steve weir
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - Randy Dawson
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - steve weir
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - steve weir
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - steve weir
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - steve weir
- » [SI-LIST] Fwd: Re: Re: Ferrite Beads on Differential Signal Lines? - steve weir
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - Lee
- » [SI-LIST] How to add excitation for helix coil - 王文松
- » [SI-LIST] How to add excitation for helix coil - 王文松
- » [SI-LIST] How to add excitation for helix coil - 王文松
- » [SI-LIST] How to add excitation for helix coil - 王文松
- » [SI-LIST] How to add excitation for helix coil - 王文松
- » [SI-LIST] Re: How to add excitation for helix coil - steve weir
- » [SI-LIST] Need a equation of inductance calculation for microstrip over the ground plane - 王文松
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - Chen, Sherman
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - steve weir
- » [SI-LIST] Re: How to add excitation for helix coil - Jiang Xiao
- » [SI-LIST] Noise coupling from TI's MSP430FR5728 MCU to TI's DS100BR210 repeater - Jinhua Chen
- » [SI-LIST] Re: Noise coupling from TI's MSP430FR5728 MCU to TI's DS100BR210 repeater - steve weir
- » [SI-LIST] Re: Noise coupling from TI's MSP430FR5728 MCU to TI's DS100BR210 repeater - Jinhua Chen
- » [SI-LIST] Minimizing EMI through Effective Signal and Power Integrity -- Upcoming Seminar from ANSYS & Zuken - Margaret Schmitt
- » [SI-LIST] Career opportunity for a new SI Applications Developer position at Keysight EEsof EDA (formerly Agilent EEsof EDA) - colin_warwick
- » [SI-LIST] Re: Big things are happening at Teraspeed Consulting - Scott McMorrow
- » [SI-LIST] Question about common mode termination of Ethernet transformers - Joel Brown
- » [SI-LIST] Asian IBIS Summit (Shanghai) - First Announcement - Bob Ross
- » [SI-LIST] Re: Question about common mode termination of Ethernet transformers - steve weir
- » [SI-LIST] Re: Need a equation of inductance calculation for microstrip over the ground plane - C.C. Hwang
- » [SI-LIST] Re: Big things are happening at Teraspeed Consulting - steve weir
- » [SI-LIST] Re: si-list Digest V14 #214 - Eric Tollefson
- » [SI-LIST] Re: Need a equation of inductance calculation for microstrip over the ground plane - Dave Cuthbert
- » [SI-LIST] Webcast: How to Optimize Your SerDes Design During the Pre-layout Phase - colin_warwick
- » [SI-LIST] Re: Need a equation of inductance calculation for microstrip over the ground plane - alfred1520list
- » [SI-LIST] Re: Need a equation of inductance calculation for microstrip over the ground plane - colin_warwick
- » [SI-LIST] Re: Need a equation of inductance calculation for microstrip over the ground plane - Lambert Simonovich
- » [SI-LIST] Re: Need a equation of inductance calculation for microstrip over the ground plane - Dave Cuthbert
- » [SI-LIST] Re: Need a equation of inductance calculation for microstrip over the ground plane - alfred1520list
- » [SI-LIST] impedance determination of a perticular interface..... - Mallikarjun K
- » [SI-LIST] Re: impedance determination of a perticular interface..... - bala
- » [SI-LIST] Multi Billion Dollar Company That Uses Only Multiplexers As Basic Components - Lucky M
- » [SI-LIST] Multi Billion Dollar Company That Uses Only Multiplexers As Basic Components - Lucky Mohanty
- » [SI-LIST] Re: Multi Billion Dollar Company That Uses Only Multiplexers As Basic Components - steve weir
- » [SI-LIST] Re: Multi Billion Dollar Company That Uses Only Multiplexers As Basic Components - Chauhan, Rajat
- » [SI-LIST] Re: Multi Billion Dollar Company That Uses Only Multiplexers As Basic Components - Rakesh Mehta
- » [SI-LIST] Re: Multi Billion Dollar Company That Uses Only Multiplexers As Basic Components - steve weir
- » [SI-LIST] Re: impedance determination of a perticular interface..... - colin_warwick
- » [SI-LIST] 2015 IEEE USA Symposium on Electromagnetic Compatibility and Signal Integrity Call for Hardware Experiments and Software Demonstrations. - Giuseppe Selli (giselli)
- » [SI-LIST] rules of thumb in SI Bogatin EDN column - Eric Bogatin
- » [SI-LIST] Re: Multi Billion Dollar Company That Uses Only Multiplexers - Hal Murray
- » [SI-LIST] Re: Multi Billion Dollar Company That Uses Only Multiplexers - Chauhan, Rajat
- » [SI-LIST] Re: Multi Billion Dollar Company That Uses Only Multiplexers - steve weir
- » [SI-LIST] Re: si-list Digest V14 #214 - Chen, Sherman
- » [SI-LIST] Asian IBIS Summit (Taipei) - First Announcement - Bob Ross
- » [SI-LIST] DGCON 2014 November 24-25, Israel - Dudi Tash
- » [SI-LIST] Re: impedance determination of a perticular interface..... - colin_warwick
- » [SI-LIST] Where SSTL_15 (DDR3 1.5V SSTL standard) is available ..? - Mallikarjun K
- » [SI-LIST] Re: Where SSTL_15 (DDR3 1.5V SSTL standard) is available ..? - steve weir
- » [SI-LIST] Signal Integrity senior year project examples - Lucky M
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - Grasso, Charles
- » [SI-LIST] Re: Ferrite Beads on Differential Signal Lines? - Lee
- » [SI-LIST] plotting large amount of s-parameters - Arnav Shah -X (arnshah - BBI TECHNOLOGIES INC at Cisco)
- » [SI-LIST] Re: plotting large amount of s-parameters - Loyer, Jeff
- » [SI-LIST] Re: plotting large amount of s-parameters - Samit Ashdhir
- » [SI-LIST] AW: plotting large amount of s-parameters - Ippich, Alexander
- » [SI-LIST] Re: Need a equation of inductance calculation for microstrip over the ground plane - Grasso, Charles
- » [SI-LIST] ESD failure - need advise - Ramesh N
- » [SI-LIST] Re: ESD failure - need advise - Pommerenke, David
- » [SI-LIST] Re: ESD failure - need advise - Orin Laney
- » [SI-LIST] Re: ESD failure - need advise - steve weir
- » [SI-LIST] Asian IBIS Summit (Yokohama) - First Announcement - Bob Ross
- » [SI-LIST] Re: ESD failure - need advise - keithK EPD
- » [SI-LIST] Re: Need a equation of inductance calculation for microstrip over the ground plane - Cristian Gozzi
- » [SI-LIST] Senior SI/PI Engineer Openings - Gordon Xiang
- » [SI-LIST] AW: Re: ESD failure - need advise - Havermann, Gert
- » [SI-LIST] Re: ESD failure - need advise - Douglas Smith
- » [SI-LIST] Re: ESD failure - need advise - Douglas Smith
- » [SI-LIST] Re: ESD failure - need advise - Douglas Smith
- » [SI-LIST] Re: ESD failure - need advise - Orin Laney
- » [SI-LIST] Re: AW: plotting large amount of s-parameters - C.C. Hwang
- » [SI-LIST] Re: ESD failure - need advise - Douglas Smith
- » [SI-LIST] Re: Senior SI/PI Engineer Openings - Gordon Xiang
- » [SI-LIST] Re: Where SSTL_15 (DDR3 1.5V SSTL standard) is available ..? - Hermann Ruckerbauer
- » [SI-LIST] Re: ESD failure - need advise - Grasso, Charles
- » [SI-LIST] bit inversion in DDR3 - Sanjay G
- » [SI-LIST] Re: bit inversion in DDR3 - Hermann Ruckerbauer
- » [SI-LIST] Re: ESD failure - need advise - Rob Oglesbee
- » [SI-LIST] interactive design and debbuging session - Douglas Smith