hello Tesla, For questions specific to a specific 3D EM solver it is always best to contact your local apps engineer and get the most return from your annual software maintenance fees :-) The following applies to Ansys HFSS, Sigrity PowerSI-3D, and just about every other 3D EM solver with which I am familiar. A lumped port is both physically and numerically a sheet of impressed current across which the voltage is then computed. I like to call it a "circuit" port for this reason. For a microstrip it is typically a rectangular object drawn the same width as the trace and oriented vertically between the trace and reference plane. For a pad/antipad/plane structure on top of a board (e.g. top of a via in a GND plane to where a coax might be soldered) the lumped port is typically the annular ring of the antipad. As suggested by others, your first graduate course in EM will discuss the concept of "reaction" or energy coupling. It is the integral of E(dot)J plus H(dot)M, where E/H are the electric/magnetic fields and J/M are the electric/magnetic current impressed sources. In the two cases above your dominant mode of excitation (microstrip and coax respectively) are well matched between their E fields and the current sheet of the lumped port. This implies the coupling to higher order modes is small. A lesson here is to draw your lumped port to align as well as possible with the dominant E-field of the mode you're trying to excite at that location. For a "wave" port the match between the trace mode and the excitation is much more precise so no mode mixing occurs at the port. That is, unless your DUT (device under test) is close enough to the port that the higher order modes the DUT produces are not well decayed by the time you get to the port. In such cases, for most 3D EM solvers I am aware of, the port fields are represented as a sum of modes. With only the dominant mode applied in a wave port you are saying the higher order mode amplitudes are zero at the port. That is, they are all short circuited at this location. This fact can help you determine analytically how far your port needs to be from your DUT. The same type of higher order mode coupling occurs for a lumped port but the lumped port interacts with the modes in a little more complex manner. This interaction (and even the wave port interaction) can be understood easily with a measurement analogy. Ask yourself how far from your DUT do you need to place the measurement probe before it no longer interacts with the DUT? For example, measuring an RF transistor requires some feedline length for the measurement probe. Call it a "fixture". You cannot drop a CPW or GS probe directly on top of your transistor or your measurements will be corrupted. You don't want too long feedlines either. In a microstrip environment you can typically remove the probes 2 substrate heights (or linewidths, whichever is greater) and your higher order mode interactions with any port are low enough you can deembed your feedlines/fixture and get very accurate measurements of the DUT. Of course, with wave ports you have the propagation constant and impedance available and can analytically remove uniform feedline. Deembedding for a lumped port is done analogously to measurements, but it is an exercise for the user and done in a manner exactly as you would do it for a hardware measurement. In addition to higher order mode couplings, you will find there is a slight parasitic associated with a lumped port. This is most typically the inductance or phase delay you would see for such current sheet. The phase error of the S-parameter is typically affected most by this parasitic. Therefore, if you are tying to simulate with extreme accuracy the parasitics of a small DUT, then be aware of this source parasitic. If it will be a significant portion of your desired measured value, even after deembedding your fixture from a slightly remote source, then you will need to consider a wave port or a manual TRL-like fixture "calibration" procedure. Wave ports don't have such source parasitic, ideally none. If you are measuring a larger circuit in a PCB or package this lumped port parasitic is usually not a concern. cheers, -Brad > -----Original Message----- > From: si-list-bounce@xxxxxxxxxxxxx > [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Tesla > Sent: Friday, August 12, 2011 3:21 AM > To: si-list@xxxxxxxxxxxxx > Subject: [SI-LIST] Why discontinuity must be far away Wave > Port excitation? > > Hi, experts > In an application note of Ansoft hfss, it said geometrical > discontinuity must be far away Wave Port. I think High-order > modes due to discontinuity may affect the E and H field > distribution leading to a wrong S-parameter. > But Ansoft said Lumped Port can be used in this situation. > but i think the E and H field of high-order modes also affect > the current and voltage of "Lumped Port". so i assume it also > lead to a wrong result. > Thanks and Best Regards. > ------------------------------------------------------------------ ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu