[SI-LIST] Re: What's the purpose of stitching vias which just connect one GND layer?

  • From: Boris Bakshan <bbakshan@xxxxxxxxx>
  • To: leeritchey@xxxxxxxxxxxxx
  • Date: Tue, 3 Nov 2015 22:07:02 +0200

Best answer so far on the SI-list ! :)
On Tue, Nov 3, 2015 at 9:51 PM, Lee Ritchey <leeritchey@xxxxxxxxxxxxx>
wrote:

Those stitching vias keep the CAD department busy and raise the cost of the
PCB. Not much else.

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On
Behalf Of Kevin Hou
Sent: Monday, November 2, 2015 9:30 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] What's the purpose of stitching vias which just connect
one GND layer?

Hi Guru:
I found one interesting thing on Intel 6-layer(S-VCC-S-S-GND-S) CRB about
the stitching via.
There are pairs of stitching GND via put around the differential
signals(PCIe gen3) transited from TOP to BOTTOM layer.
The differential signal is VCC reference on the TOP layer and GND reference
on the BOTTOM layer.
My understanding for the stitching via is to provide the return path (GND
reference transited to another GND reference) But in the Intel CRB I had on
hand, these stitching vias are only connected to one GND layer. What's the
purpose?
Using capacitor to connect VCC/GND will be better, right?


Best Regards,
Kevin Hou






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