EM simulation will not differentiate between power or ground. Everything is
metal or dielectric in EM setup. To understand behaviour of such kind of
problems. it may be more insightful to extract model with signal, power
,ground as separate ports (.s6p model). Hook this kind of extracted model
in circuit simulator (ADS, HSPICE or any other tool..) and see the response
accordingly.
implementation of such extraction setup will vary from one tool to another.
Accuracy will depend on datarate & problem size.
Thanks
Sanjeev
On Thu, Nov 3, 2016 at 5:08 AM, Paul Huang <paul.huang7531@xxxxxxxx> wrote:
Thank you Vinu, Orin, and all who answered my questions,
With regards,
Paul
Sent: Wednesday, November 02, 2016 at 12:11 AMif one of them is not connected to anything at all. Mere proximity is
From: "Vinu Arumugham" <dmarc-noreply@xxxxxxxxxxxxx>
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Transmission line terminated to Vdd only
An RF short is need at the launch end as well.
On 11/01/2016 04:05 PM, Orin Laney wrote:
Both planes cooperate to define the transmission line impedance, even
enough. However, when the signal reaches the far end, unless the planes are
shorted together RF-wise (using adequate capacitor coupling) so that HF
current can return through both, you create mode conversion and cause
ringing. The DC case remains unchanged. Bottom line: best practice ties the
planes together with caps if there is a DC potential difference, or uses
shorting vias if there is not.
freelists.org] On Behalf Of Paul Huang
Orin
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@
resistor does it mean that my trace referenced to ground operates inSent: Tuesday, November 01, 2016 3:05 PM
To: patolfo@xxxxxxxxx
Cc: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Transmission line terminated to Vdd only
Thank you Patolfo and Orin,
If I don't have a capacitor between Vdd and ground at the termination
unterminated mode and the same trace referenced to vdd plane operates in
matched impedance terminated mode?
for trace referenced to ground too? Does this mean that I lower the overall
Then if I add a capacitor does it mean that I create an AC termination
termination and I may have reflections?
wrote:
Thanks,
Paul
Sent: Tuesday, November 01, 2016 at 2:22 AM
From: "Patolfo Nery Velya" <patolfo@xxxxxxxxx>
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Transmission line terminated to Vdd only
The current will flow through the parasitics too, so ac will be couple
partly to ground plane, al cabo de la vida quisiera descansar en un
bosque de paz y sin preguntas y desde la espesura escuchar en sosiego
el preludio de un rÃÆéquiem privadÃÆÃÂsimo Benedetti **Cansancio
On Mon, Oct 31, 2016 at 6:26 PM, Paul Huang <paul.huang7531@xxxxxxxx>
------------------------------------------------------------------------------------------------------------------------------------
Hello Si-list,------------------------------------------------------------------
I have a question: I have a CMOS driver that drives a strip-line
trace referenced at top to Vdd supply power plane and at bottom to
vss ground plane. The trace is terminated to vdd only. Since there
is no termination to ground, will it be any return current flowing
through the ground plane or only through the Vdd power plane?
Thanks,
Paul
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