[SI-LIST] Re: Thickness of glue used on outer layers of PCB
- From: "Lee " <leeritchey@xxxxxxxxxxxxx>
- To: <jwalden@xxxxxxxx>
- Date: Wed, 28 May 2014 09:22:21 -0700
In most cases, a four layer board is constructed with a thick core in the
middle and two prepreg layers on the two outsides, not with two cores and a
large filler of prepreg in the middle.
-----Original Message-----
From: Jeff Walden
Sent: Wednesday, May 28, 2014 9:07 AM
Cc: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Thickness of glue used on outer layers of PCB
Thinking in terms of cores, and a core is a fully cured dielectric with
copper on both sides, a 4 layer board is 2 cores. Keep the stackup
balanced, to keep the vendor happy, the glue is the prepreg in the center
as thick as the overall stackup requires. P/p is usually available from the
material supplier apart of the same family as the cores ... the p/p could
be assumed to have a similar Er in other words as it is not quite so cured
dielectric. I will use thin cores, 3.5 mils, with thick p/p as a means of
isolating the next layer and keeping better coupling to the ground plane
apart of that core.
On Wed, May 28, 2014 at 11:05 AM, Loyer, Jeff <jeff.loyer@xxxxxxxxx> wrote:
> Most PCB material vendors publish their "prepreg" thicknesses as well as
> their "core" thicknesses, and the electrical properties of each.
> Typically
> the outer layers use "prepregs" on the outer layers. It's common to use
> prepregs as thin as 2.5 (or 2.7) mils on outer layers.
>
> Jeff Loyer
>
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of Grasso, Charles
> Sent: Wednesday, May 28, 2014 7:52 AM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Thickness of glue used on outer layers of PCB
>
> Hello all,
> When using thin (i.e ~3.5mils) dielectrics for the outer layers of (say) a
> 4 layer board - how thick
> (typically) is the glue layer that binds the outer layer?
> I am interested whether there might be a significant change in the
> effective Er that will affect impedance calculations.
> Thanks!
>
> Best Regards
> Charles Grasso
> Compliance Engineer
> Echostar Communications
> (w) 303-706-5467
> (c) 303-204-2974
> (t) 3032042974@xxxxxxxxx
> (e) charles.grasso@xxxxxxxxxxxx
> (e2) chasgrasso@xxxxxxxxx
>
>
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--
Jeffrey L Walden
EMC/SI RF analysis and product development
http://www.linkedin.com/in/emcsirf
jwalden@xxxxxxxx
(866)547-5365
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