Hello all, At Package level (buildup technology) , our measurement of the
copper conductivity is closer to 5.5 e7 S/m at room temperature (some
variation can be seen depending the laminate suppliers (related to their
semi additive plating processes)
Jean Audet
Electrical Analysis
STG / World Wide Packaging & Test
Organic and Ceramic Packages
IBM Corp. (Bromont)
From: Jeff Loyer <jeff.loyer@xxxxxxxxxx>
To: "Grasso, Charles" <Charles.Grasso@xxxxxxxxxxxx>,
dbrooks9@xxxxxxxxxxxxxxx, si-list@xxxxxxxxxxxxx, george.q.jiang@xxxxxxxxxx
Date: 2015-10-26 14:33
Subject: [SI-LIST] Re: Thermal measurements on a test board
Sent by: si-list-bounce@xxxxxxxxxxxxx
Hello all,
Charles is right - we never got to the bottom of the issue. And it's
reassuring that George got the same numbers, though in our paper we list
other sources who have measured approximately the same resistivity (it's
not a measurement error). The papers we published were:
"Accurate Insertion Loss and Impedance Modeling of PCB Traces" and
"Humidity and Temperature Effects on PCB Insertion Loss "
As Istvan noted, it's important to strongly distinguish between stripline
and microstrip layers.
Stripline layers (for rigid PCBs) are ED copper, probably subjected to
some kind of processing to enhance their adhesion properties. Our
measured resistivity for stripline was 2.1e-6 ohm-cm (4.7e7 S/m
conductivity).
Microstrip layers are primarily the plating copper (for relatively thick
server boards). Our measured resistivity for microstrip was 2.4e-6
ohm-cm (4.1e7 S/m conductivity).
(Copper resistivity = 1.7e-6 ohm-cm, conductivity = 5.88e7 S/m)
The temperature coefficient was even more disturbing, primarily because
it's such a simple measurement (note the change in resistance for a
certain temperature range) but also because it varied so much between
samples and between foreign and domestic (U.S.) vendors:
Temp Coefficient
top sl1 bot sl2
Foreign Vendors' Average: 0.25% 0.28%
0.22% 0.32%
Domestic Vendors' Average: 0.38% 0.40%
0.55% 0.41%
(Copper temp. coefficient = 0.4%/degree C)
I don't think the problem is the copper as delivered to the laminate
vendors for foil lamination, IPC specs. that carefully and I believe the
laminate suppliers and foil vendors monitor it.
One final data point I have to offer is that my understanding is that the
disparity is not seen on copper used in packages - those match that of
copper.
Jeff Loyer
(previously w/ Intel)
Signal & Power Integrity Product Manager
Altium US
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Jiang, George Q
Sent: Monday, October 26, 2015 10:35 AM
To: Grasso, Charles; dbrooks9@xxxxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Thermal measurements on a test board
The number is very close to what we have received from our PCB supplier.
George
-----Original Message-----
From: Grasso, Charles [mailto:Charles.Grasso@xxxxxxxxxxxx]
Sent: Monday, October 26, 2015 1:32 PM
To: Jiang, George Q; dbrooks9@xxxxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: RE: [SI-LIST] Re: Thermal measurements on a test board
Hello all - Jeff Loyer (Intel?) gave a nice presentation at the Front
Range SI seminar series that pointed this issue out March 7 2013
(http://bethesignal.com/wp/2013/03/)
His high frequency resistance curves for copper were not matching
simulation and discovered that the traces being measured had a DC
resistance that was higher than predicted by physics. In other words the
resistance of copper was increased after the pwb manufacturing process. He
reported 4.7e7 S/m vs 5.9e7 S/m. I followed up (last year I think) and he
had not got to the bottom of the issue.
Best Regards
Charles Grasso
Compliance Engineer
Echostar Communications
(w) 303-706-5467
(c) 303-204-2974
(t) 3032042974@xxxxxxxxx
(e) charles.grasso@xxxxxxxxxxxx
(e2) chasgrasso@xxxxxxxxx
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Jiang, George Q
Sent: Monday, October 26, 2015 5:36 AM
To: dbrooks9@xxxxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Thermal measurements on a test board
Doug,
One of our PCB suppliers gave us its copper foil resistivity, which is
higher than the published bulk copper resistivity.
Regards,
George
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Doug Brooks
Sent: Thursday, October 22, 2015 8:00 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Thermal measurements on a test board
I am looking for some thoughts on some measurements I have just taken
I have a new test board I have done some preliminary measurements on, and
have come up with the following measurements:
Resistivity 0.8666 micro-ohm in (expected 0.67)
Thermal coefficient of resistivity (alpha) .0048 (expected .0038)
The "expected" values are the published values for "copper", not
processed copper on a PCB. Have any of you done similar measurements and
come up with similar values?
Doug
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