[SI-LIST] Re: S-parameter to Circuit Model extraction?
- From: Faraydon Pakbaz <pakbazf@xxxxxxxxxx>
- To: "Anil Pannikkat" <APANNIKK@xxxxxxxxxx>
- Date: Tue, 21 Feb 2006 14:43:21 -0500
$)CAnil;
The slides are posted at:
http://si-list.org/files/tech_files/model_extraction/
Thanks to Ray Anderson. Here are some explanation of slides for the file
named
TFBM.ppt
================================================================================
Slide-1 : Shows typical scenario of silicon to silicon communication and
all the difficulties.
Slide-2: Shows a high level simulation setup which if full model put in
simulator like SPICE,
it may take day or two for one run. Here I am trying to
come up with behavioral model
of 40 inch PCB trace using its measured S-parameters for
frequency of operation
between 50Mhz to 1.25 GHz.
Slide-3: Shows the measured data and my model(blue curve). Note that since
my range
of frequency is up to 1.25 GHz, I really don't care if my
model do not much after this
frequency because if I do, it will make the transfer
function unnecessarily complicated.
It shows the model is good up to 1.5 GHz within 0.5 dB or
less.
Slide-4: Shows the transfer function of "Loop Shaped S21" and its partial
fraction expansion
and the resulted RLC filter. Note that since my circuit is
based on rational transfer
function, I don't have to worry about passivity and better
yet, it is realized as an
RLC circuit so it is passive to begin with.
Slide-5: Shows the Step response of all three model in slide-4. They are
almost identical.
Slide-6: Is the jitter simulation, I have done by putting the circuit in
slide-2. I was within 10 percent
of hardware measurement ( on a conservative side)
Slide_7 to 10: Is the same principal but I wanted to examine how much noise
my PLL regulator
attenuates and this is shown in slide-10.
===============================================================================
Here is the explanation for the file Decap.ppt:
It shows how to calculate the ESL of the board decap using abobe described
method.
Note The top plot which is the vendor spec and lower plot shows, how I loop
shaped to
come up with the ESL of capacitor and next to the plot shows a model of
capacitor
that gets used to optimize target impedance of the board.
===============================================================================
Regards;
Don Pakbaz
ASIC and Signal Integrity Specialist
IBM Silicon Solution Engineering
"Anil Pannikkat"
<APANNIKK@altera.
com> To
Faraydon
02/21/2006 01:07 Pakbaz/Burlington/IBM@IBMUS
PM cc
Subject
RE: [SI-LIST] Re: S-parameter to
Circuit Model extraction?
Hi Don
Your comments were very interesting. I have been thinking of doing this
for some time and did not because I did not have easy access to Mathlab.
Would it possible for you to send me your process so that I can try to do
the same.
Thanks
Anil
Anil Pannikkat
Sr. MTS Package Development * : 408-544-7542
Altera Corporation Fax:
408-544-6404
101, Innovation Drive, M/S 4202 *:
apannikk@xxxxxxxxxx
San Jose, CA 95134 *:
http://www.altera.com
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Faraydon Pakbaz
Sent: Monday, February 20, 2006 4:44 AM
To: imsong91@xxxxxxxxx
Cc: si-list@xxxxxxxxxxxxx; si-list-bounce@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: S-parameter to Circuit Model extraction?
Inmyung;
Using raw S-parameter data in SPICE is somewhat painful. I used Matlab and
I loop shaped the S21 which then I got the Transfer function. From transfer
function I created the RLC circuit which then can be used in any simulator
that recognizes the RLC circuit (such as SPICE). I modeled only the "Mag vs
Frequency" and not the phase since in SerDes, typically magnitude of signal
between Transmitter and Receiver is most important. The problem with
p-model or T-model and in general transmission line, is that for 40 inch
trace and depending to frequency, you may end up with more than 4000
passive elements. This takes too long a simulation. Transfer Function
Behavioral Model (TFBM) is a way to go. I would of post some slides to
describe this but they are telling si-list cannot take attachments like
power point.
Regards;
Don Pakbaz
ASIC and Signal Integrity Specialist
IBM Silicon Solution Engineering
"5(E8<R3b "
<imsong91@xxxxxxx
om> To
Sent by: <si-list@xxxxxxxxxxxxx>
si-list-bounce@fr cc
eelists.org
Subject
[SI-LIST] S-parameter to Circuit
02/20/2006 12:11 Model extraction?
AM
Please respond to
imsong91
P{margin-top:2px;margin-bottom:2px;}
Hello,
I measured some PCB structures and Wafers by VNA to get the S-parameters.
As I know, there are many extraction algorithm in this world, right?
But I know only one technique which is EO's paper in 1992.
If anyone knows other methodologies, please reply me.
By the way, to compare the measured S-parameter with the simulated
S-parameter from circuit model,
I think that I have to do spice simulation. But I am not sure the spice can
extract S-parameter from
frequency dependant circuit models.
And which circuit model is more accurate, for example PI-Model, T-Model,
Telegraph Equation.?
Thank for your reading.
Inmyung Song.
;l7A6s! 4g=E@G =:E8@O! ;o<:DMBFy 32,000?x[1] [IMG]
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