Title: Signal Integrity Application Engineer Location: S.F. Bay Area CA Job Description: Leading interconnect system company seeks a candidate with an enthusiastic personality to actively assist customers in defining their next generation high speed physical layer connectivity. The successful candidate will be part of the signal integrity application team and will participate in defining customer system interconnects and creating next generation interconnect products. Your responsibilities will include but not be limited to: - Work with customers on various high-speed serial I/O, Back plane and signal applications - Develop unique interconnect solutions based on customer objectives - Select appropriate signaling and interconnect technology for high performance links - Simulate and/or analyze the overall link to develop the sensitivity of each piece of physical layer - Generate the correct routing requirements and electrical margins for specific interfaces - Determine the root cause of any issues in existing channels for customers - Design and conduct detailed testing and measurements to collect data for validation and correlation of design analysis - Make recommendations for improvement of interconnect systems (connectors and cable assemblies) designed by central design teams - Perform detailed design reviews and provide recommendations to customers - Determine guidelines to mitigate EMI from interconnect systems - Determine effect of power distribution network (PDN) connectors on overall AC or DC performance of PDN - Work with front end tools/applications to capture customer requirements and provide design specific recommendations Skills: Required -Proficient with statistical and time domain serial link simulation techniques/methods, field-solver -In depth understanding of electromagnetics -Correlating simulation results with lab measurements using oscilloscopes, TDRs, VNAs, and spectrum analyzers -Familiar with high speed serdes design, architectures, protocols and modeling methods of high-performance I/O technologies -Self motivated -Ability to work in a team environment -Strong communication skills Preferred -Experience with CAD/CAE tools such as Channel Designer, HFSS, CST, FDTD tools, MoM tools, Sigrity PowerSI, PAKSI-E, Power-grid, Agilent ADS, Agilent PLTS, Cadence CAD tools or related tools. -Capability of scripting/automating the analysis flow with point tools Education: Bachelor's degree in EE with 8+ years (OR MSEE/PhD with 5+ yrs) of experience in relevant area of designing and supporting high speed electrical interconnects To apply send resume or call: Bruce Harvie Connection Recruitment Inc. bruce@xxxxxxxxxxxxxxxxxxxxxxxxx 845 298 0533 ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu