The paper submission deadline for EPEPS 2010 to be held in Austin Texas Oct. 24-27, 2010 has been extended to Mon. Jul. 26, 2010. Details on the submission requirements and the link to submit your paper are at our web site: http://epeps.org. Thanks for your support of the conference and I'm looking forward to seeing you in Austin. Dale Becker, Ram Achar, EPEPS 2010 Co-Chairs. Below is the call for papers from the web site http://epeps.org. EPEPS is the premier international conference on advanced and emerging issues in electrical modeling, analysis, synthesis and design of electronic interconnections, packages and systems. It also focuses on new methodologies and CAD/design techniques for evaluating and ensuring signal, power and thermal integrity in high-speed designs. EPEPS is jointly sponsored by the IEEE Components, Packaging and Manufacturing Technology Society and IEEE Microwave Theory and Techniques Society. Authors are invited to submit papers describing new technical contributions related to the broad area of electrical performance of high-speed designs, covering: 1. Emerging and advanced issues, 2. New design techniques and innovative architectures for design and management, 3. Novel CAD concepts, methodologies and algorithms for modeling, simulation and optimization, with emphasis on: System-level, board-level and on-chip interconnects High-speed channels, links, backplanes, serial and parallel interconnects, SerDes Multiconductor transmission lines Memory and DDR interfaces Jitter and noise management Signal and thermal integrity Power integrity and power distribution networks (PDNs) Electronic packages and microsystems 3D interconnects, 3D packages, TSVs and MCMs Nano interconnects and nano structures RF/microwave packaging structures, RFICs, mixed signal modules and wireless switches Package-chip co-design Electromagnetic (EM) and EM interference modeling, simulation algorithms, tools and flows Macromodeling including model order reduction as it applies to electrical analysis Advanced and parallel CAD techniques for signal, power and thermal integrity analysis Measurement and data analysis techniques for system-level and on-chip structures. ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu