[SI-LIST] EPEPS Submission deadline extended to July 26.

  • From: Dale Becker <wbecker@xxxxxxxxxx>
  • To: EPEPS%IBMUS@xxxxxxxxxx
  • Date: Wed, 14 Jul 2010 08:21:38 -0400

The paper submission deadline for EPEPS 2010 to be held in Austin Texas
Oct. 24-27, 2010 has been extended to Mon. Jul. 26, 2010.

Details on the submission requirements and the link to submit your paper
are at our web site: http://epeps.org.

Thanks for your support of the conference and I'm looking forward to seeing
you in Austin.

Dale Becker, Ram Achar, EPEPS 2010 Co-Chairs.


Below is the call for papers from the web site http://epeps.org.

EPEPS is the premier international conference on advanced and emerging
issues in electrical modeling, analysis, synthesis and design of electronic
interconnections, packages and systems. It also focuses on new
methodologies and CAD/design techniques for evaluating and ensuring signal,
power and thermal integrity in high-speed designs. EPEPS is jointly
sponsored by the IEEE Components, Packaging and Manufacturing Technology
Society and IEEE Microwave Theory and Techniques Society. Authors are
invited to submit papers describing new technical contributions related to
the broad area of electrical performance of high-speed designs, covering:
   1. Emerging and advanced issues,
   2. New design techniques and innovative architectures for design and
      management,
   3. Novel CAD concepts, methodologies and algorithms for modeling,
      simulation and optimization,


      with emphasis on:
      System-level, board-level and on-chip interconnects
      High-speed channels, links, backplanes, serial and parallel
      interconnects, SerDes
      Multiconductor transmission lines
      Memory and DDR interfaces
      Jitter and noise management
      Signal and thermal integrity
      Power integrity and power distribution networks (PDNs)
      Electronic packages and microsystems
      3D interconnects, 3D packages, TSVs and MCMs
      Nano interconnects and nano structures
      RF/microwave packaging structures, RFICs, mixed signal modules and
      wireless switches
      Package-chip co-design
      Electromagnetic (EM) and EM interference modeling, simulation
      algorithms, tools and flows
      Macromodeling including model order reduction as it applies to
      electrical analysis
      Advanced and parallel CAD techniques for signal, power and thermal
      integrity analysis
      Measurement and data analysis techniques for system-level and on-chip
      structures.

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