Since most of the discussion regarding IBIS-AMI seems to be occurring on the si-list rather than the IBIS reflector I thought I'd post this question here. How is it envisioned that IBIS-AMI (and EDA vendors) will model the following: 1) Analog equalized receivers without clock recovery 2) Limiting amplifiers 3) Amplifier (receiver) noise 4) External Equalizer selection pins such that they operate consistently across EDA platforms 5) Cascaded non-CDR repeaters in a channel. 6) Analog auto-adaptive equalization regards, Scott -- Scott McMorrow Teraspeed Consulting Group LLC 121 North River Drive Narragansett, RI 02882 (401) 284-1827 Business (401) 284-1840 Fax http://www.teraspeed.com Teraspeed® is the registered service mark of Teraspeed Consulting Group LLC ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu