Hi Chetan--
Your suspicion is correct - you typically do get a more resin-rich area around
the traces when the board layers are pressed together, giving you a lower Dk
(or Er) around the traces. It is best to talk to your manufacturer about what
value they use there. In order to maximize yield, many manufacturers go to
great lengths to make sure they are modeling their traces properly, and this
includes an accurate Dk around the traces (on the conductor layers).
More importantly, make sure you are using the right Dk for the dielectrics
themselves. These can typically have a very wide range of Dk values so making
sure you use the right one, for the specific dielectric material AND thickness
that you have in your stackup, is crucial to getting those timing numbers to be
accurate. Again, talk to your manufacturer to make sure you are inputting the
right data.
The following blog post (and referenced article) may be useful to you:
https://blogs.mentor.com/hyperblog/blog/2011/08/02/can-you-make-z-higher/
--Pat
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On ;
Behalf Of chetan reddy
Sent: Monday, April 17, 2017 5:32 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Regarding
Hi Experts,
i have a doubt in entering stackup into PCB designers for length matching
calculations. What should i enter dielectric material fill in the conductor
layers? is it the adjacent dielectric layers properties(Dk) values or epoxy
resin(Dk)?
Please kindly help me in clarifying.
Regards
Chetan
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