[SI-LIST] Re: R: How to simulate the signal going into connector
- From: Hermann Ruckerbauer <hermann.ruckerbauer@xxxxxxxxxxxxx>
- To: gianguida@xxxxxxxx
- Date: Mon, 21 Jun 2010 21:18:35 +0200
Hello shahbaz ,
seeing the signals at the connector only is a bit difficult, as it
always needs some Transmitter and Receiver models to do some Time domain
simulation.
And the interesting signal ist not at the connector, as this signal is
completely different to what your devices are seeing (maybe I
missunderstood your question)
So if you would like to see the impact of the connector do the following:
- Download the Connector model (that is most likely available from the
connector vendor)
- Downlaod a corresponding IBIS model for the DRAM (e. g. the one you
are using (or any other .. it's conmodity ... )
- Check if you get IBIS model from any FPGA vendor (e. g. Xilinx (or the
one that you are using (once you know it))
- Model the topology and routing on the board
once you have done this you can simulate and check on the DQ and CA Bus
signal quality.
==> This is the daily job: not the simulation is the time consuming
part, but getting the models (and validating them) ...
Regards
Hermann
EKH - EyeKnowHow
Hermann Ruckerbauer
www.EyeKnowHow.de
Hermann.Ruckerbauer@xxxxxxxxxxxxx
Veilchenstrasse 1
94554 Moos
Tel.: +49 (0)9938 / 902 083
Mobile: +49 (0)176 / 787 787 77
Fax: +49 (0)3212 / 121 9008
schrieb gianguida@xxxxxxxx:
> Hi shahbaz,
> one possible way is generating model for your connector by means of a
> simulation.
>
> Depending on the accuracy you need and on the connector dimensions compared
> to wavelength
> you may want use a a quasi-static tool like Ansoft Q3D (in this case you can
> obtian a RLCG model)
> or full-wave simulator like HFSS or Microwave Studio or any other of the godd
> 3D simulator available in the market
>
> Hope this helps
> Giancarlo
> ________________________________
>
> Da: si-list-bounce@xxxxxxxxxxxxx per conto di Shahbaz Assad
> Inviato: lun 21/06/2010 13.23
> A: si-list@xxxxxxxxxxxxx
> Oggetto: [SI-LIST] How to simulate the signal going into connector
>
>
>
> Hi Experts,
>
> I want to simulate some DDR2 signal that are going into the mating
> connector. The DDR2 is on the daughter card and it has to interface with the
> FPGA.
> Now please tell me how to simulate the DDR2 signals on the connector pins. I
> dont know what FPGA we are using on main board. I want to see my signal on
> the connector only.
>
> Tell me what is the best way to study the case?
>
> -shahbaz
>
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