I had the same thoughts. Could there be weak coupling (feedback loop) from the processor's clock back to the crystal controlled pulse generator? Or are you just catching those unlucky occurrences where things happen to line up? What if the pulsewidth you were trying to measure was almost exactly a multiple of 18ns? As the pulsewidth changed (over several minutes or hours) from slightly less, to slightly more, wouldn't that cause the results you see? I wonder if jittering the data (introducing a noise source before the pulsewidth generator) might actually help. Andy > ---------- > Steve, > > I haven't worked with anything like you describe but, if I understand > your description, I suspect that the time periods where you have > jitter > in the measurement are the periods when the "crystal ctld pulse > generator" > and the measurement circuit clock references are strongly in phase. > > That is, they are two different references so their frequencies are > constantly > drifting in relative phase. Given the right conditions, they line up > and stabilize > and you get a deterministic phase offset "detected" by the measurement > > circuit. > > Or, maybe I'm just dreaming. > -John > > > ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu