[SI-LIST] Re: Potting/encapsulation/conformal coating and SI
- From: steve weir <weirsp@xxxxxxxxxx>
- To: a.ingraham@xxxxxxxx, <si-list@xxxxxxxxxxxxx>
- Date: Tue, 05 Oct 2004 06:00:43 -0700
Andy, while potting is popular for structural strength, one also needs to
be careful about both the curing process and the linear expansion tempco of
the cured material. A power supply brick mfg. who shall remain nameless
managed to mix a little too much catalyst and ended up with infant failures
when the shrinking epoxy overstressed SMT resistors and capacitors.
Regards,
Steve
At 08:35 AM 10/5/2004 -0400, Andrew Ingraham wrote:
>You also would want to choose a potting material that doesn't exhibit
>undesirable characteristics (i.e., loss) at the frequencies of interest.
>
>I know zilch (nothing) about the electrical characteristics of potting
>materials, so I don't know whether there are lossy compounds that you need
>to avoid. Certainly anything that is even slightly conductive, or sprinkled
>with fine metal particles, would be bad. This sounds like something where
>the electrical engineer should help specify the potting material and make
>sure someone can't change the formula later, not realizing the electrical
>impact it could have.
>
>I have seen L-C circuits that were potted. Because it's in such close
>proximity to the coil's windings, it probably affects their self-capacitance
>as well, so final tuning should take that into account.
>
>Regards,
>Andy
>
> > Be sure to evaluate what the coating will do to the impedance of your
> > PCB traces. If you intend to coat the board, design to account for that
> > effect. Adding conformal coating to a properly operating board _may_
> > cause improper operation of the circuitry if you are depending on a
> > particular impedance.
>
>
>
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