[SI-LIST] Re: Peak Distortion Analysis
- From: "Cheng, Chris" <chris.cheng@xxxxxx>
- To: "vladimir_dmitriev-zdorov@xxxxxxxxxx" <vladimir_dmitriev-zdorov@xxxxxxxxxx>, "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
- Date: Tue, 26 Feb 2013 00:31:16 +0000
Vladimir,
Great insights. And I would like to add the following observations.
I have search high and low (almost 14 years) for a real life case of
non-optical related BER 12 or 15 shipping product and even ask for one in
Si-list. So far there is no taker willing to tell me they are shipping a
product that takes an error every few hours or days. All the cases I've seen
are related to manufacturing defects or even alpha particle induced failures.
None can be traced back to "signal integrity" BER. I've always suspect BER
analysis is like the 3 sigma tester guard band we so often used in the last
century (80's and 90's) for timing analysis. Designers are simply uncomfortable
in shipping a design (no matter how thorough the analysis is) without some kind
of sandbagging. Tester guard band is the easy blame in the old days and now Rj
just carry the same burden. After all, you don't know what you don't know and
random is a pretty unknown thing to most people including myself. And the
cottage industry that generates around Rj analysis carries a life of its own.
I have accepted some form of statistical Rj is here to stay no matter how
difficult I found to have a real life product that exhibits this problem.
I do feel a hybrid approach of combining PDA with statistical analysis can be a
good compromise.
But I do feel it is harder and harder to define the two approaches.
Let's start with PDA.
I think the classical impulse channel response to worst case pattern is
probably over simplified the problem. Dual edge or even multi-edge worst case
pattern will probably be a better PDA for our current need. However, there is a
big issue I see in PDA for higher speed SerDes. Starting with speed as low as
6Gb/s and certainly above 10Gb/s, we observed a significant disconnect between
eye opening observed at the input of receiver (some form of probing) and
equalized output of receiver (through some margining tool in internal phase and
voltage). What I mean is the best eye opening observed at the receiver pin may
not be the best eye opening at the equalized receiver output. In fact, we've
seen cases of the best post equalized receiver eye comes from a totally closed
eye at the input pins. There are many reasons for this. Typical SerDes
designers assume certain channel loss to begin with their design, the CTLE or
DFE will default to a minimum peaking or post cursor tap equalization. If you
have a perfect eye opening at the receiver input pins, you may end up having an
over equalized eye that is worst than you expected. To complicate things
further, the CDR circuit may take a separate path of equalization with its own
peaking setting. Your CTLE and DFE may do its job and have the best eye opening
at the slicer, if your CDR have the wrong frequency peaking response (e.g. due
to high frequency ISI), you may still end up with a worst eye opening because
the CDR moves the sampling point to a phase you don't expect.
So what we are really going after is an end to end channel analysis where we
have to analyze signals from the input of the Tx to the output of the equalized
receiver at the slicer subjected to the sampling phase variation.
My question is, how do you define your worst case pattern under the above
system ? At the minimum the equalization is divided between the Tx FIR, Rx
CTLE/VGA and Rx DFE. In our observation, at least the DFE is moving in time and
does not stay constant. I've seen claims that even the CTLE is non linear and
subject to large signal variation. How do we lock down the tap settings for the
FIR, CTLE and DFE to generate the PDA worst case pattern ? To make things even
more interesting, there are standards (such as 12G SAS) which allows back
channel adjustment between the Tx and Rx. Your worst case pattern may induced a
dynamic adjustment of the equalizer settings that may results in a different
worst case pattern.
To flip the problem around to the statistical guys.
How does your LTI work if the tap setting is changing in time and pattern
dependent ? There are even claims that the jitter transfer characteristics is
linear only when your jitter amplitude is small compared to UI. What if you
have a closed eye as mentioned above where the jitter (deterministic or not)
dominates the overall eye opening ?
Given the above problems, I believe that best compromise will be to use your
PDA to converge to close to the worst case tap settings and then operate your
statistical analysis with those setting (I think some people call it state
space analysis).
A lot of AMI models claim they can do CDR or DFE modeling. But that may simply
be based on a impulse model generate state space tap setting that may or may
not be the worst case tap setting. Not to mention back channel adjustment.
I am not saying inheritably AMI models cannot support the hybrid approach. It's
just hard for that to happen in real life. Think in a real life SerDes model
generation. The SerDes designer most likely will never know the real life
channel application. He/She will designed it based on some ideal spec that
he/she assumes the SerDes will go into. The application engineer then take the
full circuit and abstract it to the best he/she knows. The CAD tool vendor will
try to anticipate what the SerDes looks like and come up with the template that
the model needs within the AMI framework. And the system design end user will
take a leap of faith that he/she may or may not even be able to validate in
real life. This is like the story with blind folded men in a room with an
elephant. One holds the tusk, the other holds the leg, another feels the ear
and yet another feels the belly..... I hope you catch what I am saying. I claim
it is always a leap of faith as it is close to impossible to really measure
what the slicer sees. Many silicon application engineer or CAD vendor claim
they are doing a good job until we sit down and review the real model and
compare that with real life measurement. Sometimes they just clamp up and claim
the model is proprietary even though they are not close to reality.
How many year since IBIS comes out with SSO models ? And how many IBIS models
actually got shipped by chip vendors that has SSO model included ?
I think there will be a lot of AMI SerDes models being released. How many of
them actually go beyond simple taps of FIR, linearized CTLE and simple pulse
deduced taps of DFE that can truly have variable hybrid timing domain and
statistical state space support will be interesting to see.
Finally, I don't claim I have the definitive solution for the above problems. I
am still a seeker and have an open mind for anyone who claim they have a
solution. Just prepare to show us data.
Chris Cheng
Distinguished Technologist , Electrical
Hewlett-Packard Company
+1 510 413 5977 / Tel
chris.cheng@xxxxxx / Email
4209 Technology Dr
Fremont, CA 94538
USA
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Dmitriev-Zdorov, Vladimir
Sent: Monday, February 25, 2013 9:05 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Peak Distortion Analysis
Hi Richard,
You touched a very interesting question about relationship between peak
distortion analysis (sometimes considered as finding the worst case pattern
producing the maximal eye stress) and statistical analysis.
Strictly speaking, the answer is that accurately and properly organized
statistical simulation should be able to consider all possibilities including
the ones coming from the worst pattern/xtalk etc. combinations, plus
non-deterministic impairments such as Tx/Rx jitter and noise. If statistical
analysis does all that correctly, then from practical point of view it is
preferable to PDA because it gives the realistic - not overly pessimistic -
eye/BER estimates.
We can turn above statement into the following: accurate statistical simulation
MUST INCLUDE the elements of PDA, implicitly or explicitly. And, accurate
statistical analysis by its 'complexity' exceeds PDA, because not only it
provides the eye margins, it should also provide the probabilities of all
possible sampling locations on the Voltage-UI plot.
However, - and we should make it very clear - it is very difficult to make
statistical analysis pair with PDA and its modifications in some special cases.
Even PDA could be a non-trivial problem.
One simple case which both classical PDA and statistical simulation easily
handle is completely unconstrained uncorrelated bit pattern. In this case, the
'worst' bit input/xtalk combinations are included into ISI PDF 'automatically'.
But, any non-triviality, such as band limited pattern (including 8b10b
encoding), asymmetry between rising/falling edge transitions, or data-dependent
jitter where Tx phase jitter depends on the number of preceding bits - all
those cases, and worse their fancy combination makes peak distortion analysis
and also accurate statistical simulation very difficult and almost impossible.
Imagine 8b10b input pattern which is combined with strict data-dependent jitter
(this jitter cannot be considered statistically, independently from the input)
in presence of asymmetry in the rising/falling transitions. What is the input
that PDA would need to find?
We in Hyperlynx have several unique solutions for such special cases: finding
the worst case input pattern and hence maximally tight voltage/timing margins
for
- 8b10b input pattern
- regular uncorrelated input when rising/falling transitions are not
symmetrical (typically, when Tx produces considerable common mode component and
the channel provides some skew that converts part of this common mode into
differential)
- 8b10b input with edge asymmetry
- stiff data-dependent Tx jitter given by a table of bit combinations and
corresponding phase jitter.
For those and others we have patent protected solutions targeting the worst
input and maximal eye stressing, and the elements of these solutions are also
embedded into the statistical analysis.
Be aware that not all tools support those things in statistical analysis. For
example, try to perform statistical simulation with 'uncorrelated' bit pattern
and 8b10b pattern as an input. Does the tool allow such distinction, don't you
have identical results in both cases? You shouldn't.
Vladimir
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
> Behalf Of Richard Allred
> Sent: Saturday, February 23, 2013 9:03 PM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Peak Distortion Analysis
> Greetings,
> A few years ago I actively used peak distortion analysis (PDA) to estimate
> the worse case timing and voltage margin from a simulated
> channel pulse response. More recently I have totally moved away from PDA
> toward using statistical type analysis which directly
> estimates >BER performance.
> I am wondering if there are people out there who actively use peak distortion
> analysis. Is it still useful to anyone? Is there a place for
> PDA in the signal integrity engineer's toolbox still?
> Thanks,
--
> Richard Allred
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