[SI-LIST] Re: Parasitic extraction and correlation to package delaymeasurement
- From: "Ozgur Misman" <omism@xxxxxxxxx>
- To: RJatou@xxxxxxxxxx
- Date: Mon, 24 Jun 2002 17:57:21 -0700
Hi Ross,
With Ansoft, or with any other tool in general the accuracy highly depends
on the mesh density.
I am not sure which version of TPA you are referring to, however I know the
capacitance results change quite a bit with increasing mesh density.
The capacitance tends to get smaller with finer mesh. This may cause
change in delay.
To understand the root cause I would increase the mesh density and rerun
the simulation to see any difference?
If the question is how the simulation corresponds to actual measurement,
I would say quite good as far as the inductance. Recently I have finished
looking at wirebond simulation and measurement correlation in Q3D.
The match is very good.
However, capturing the correct loopheight seems to make a difference.
If you are dealing with high I/O count packages with lots of wirebonds
(such as a high ball count PBGA package used in packaging a grahics
processor).
I would review the wirebond models and the Dk for the substrate. I wonder
what Dk value you are using .?
Best Regards,
Ozgur Misman
Ross Jatou <RJatou@xxxxxxxxxx>@freelists.org on 06/24/2002 05:06:08 PM
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Subject: [SI-LIST] Parasitic extraction and correlation to package delay
measurement
I would like to solicit you opinions on parasitic extraction using such
tools as Ansoft TPA and others.
Have you conducted any correlation studies to see how accurate the
extraction is?
Can such tools predict parasitics that provide delays to match real
measurements to for example 5 psec?
We have had trouble getting good correlation results and was wondering if
others have the same trouble.
______________________________________________
Ross Jatou
Senior Manager, PCB Design Methodology
Tel. 408-486-2841 Fax 408-486-4841
Nvidia corporation
2701 San Tomas Expwy., Santa Clara, CA 95050
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