Well, that was weird. What I meant to say was:
Edin,
Sorry for the delay in reply - busy week!
You're correct, from a spec standpoint, your AIC & riser together would be have
to be considered as the AIC for compliance purposes.
The compliance tools I use simulate the link end-end with "spec" TX/RX models
to produce an eye diagram used to measure eye height and width for compliance,
among other things. I'm not sure how hard and fast the 750ps requirement for
the AIC is ... my experience so far has been at the whole-link level.
That said, I do know that the package model assumed for PCIe3 compliance is ...
shall we say ... rather lossy. If you know the package model on your AIC is
better than the spec model and you can adjust the Compliance Analysis to
account for that (... and that can be done), you can probably exceed the 750ps
PCB budget and still fit within the spec.
Todd.
Todd Westerhoff
High-Speed Design Product Marketing | Electronic Board Systems (EBS)
Siemens EDA
300 Nickerson Rd, Marlboro, MA 01752
todd.westerhoff@xxxxxxxxxxx<mailto:todd.westerhoff@xxxxxxxxxxx> | office:
508-303-5821 | cell: 978-846-0203
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