[SI-LIST] Re: PCI I/O design jumpstart
- From: "Ingraham, Andrew" <Andrew.Ingraham@xxxxxxxxxx>
- To: <degerstrom.michael@xxxxxxxx>
- Date: Fri, 22 Feb 2002 14:16:26 -0500
> 1) We have the PCI Local Bus Rev 2.2 spec. Are there any
> other spec's/app notes that will be of use?
For plain PCI, I think that is most of what you NEED. You could also =
pick up one of the commercial PCI books, but some just re-hash the spec. =
Seeing it in another light can help some folks.
> 2) The CMOS technolgy will be 3.3V compliant but not 5 Volt
> compliant. Are there 5 Volt signals on the mainboard or
> other PCI cards that may not be compatible with our 3.3V
> maximum voltage requirement?
Understand that PCI has two electrically different kinds of buses: 5V, =
and 3.3V. The choice is made in the design of the motherboard or system =
board. Any PCI bus is either 5V or 3.3V, and can't be changed. An =
add-in card can be either, or both ("Universal").
To date, most PCI buses have been of the 5V variety; there are few 3.3V =
buses yet.
A 5V PCI bus doesn't mean that the signals are full 5V rail-to-rail. A =
3.3V CMOS rail-to-rail signal may satisfy the 5V PCI electrical =
requirements. But being attached to a 5V PCI bus, means that you need =
to accept steady-state 5V signals (without clamping to 3.3V), should a =
device on the bus drive them. And then there's overshoot, which can go =
a volt or more beyond the rails, especially on a 5V PCI bus where there =
might be no high side clamp diodes.
On a true 3.3V PCI bus, there would be no 5V signals on the bus (aside =
from DC power). There are a few loosely defined signals on the PCI =
connector, i.e. JTAG, that aren't really defined electrically in the PCI =
spec, but let's ignore those.
Motherboards built to the Rev. 2.1 spec were not required to provide =
3.3V power on 5V PCI connectors. This forced many PCI add-in cards to =
have on-card regulators. Motherboards that comply with the Rev. 2.2 =
spec must supply 3.3V power. Still, you may encounter systems, even new =
ones, that don't. If your cards are 3.3V PCI only (no 5V tolerance), =
this shouldn't be an issue for you.
> 3) What is/are the basic I/O? For example are all I/O
> the same bi-directional design or are there input-only and
> output-only buffers? I've seen mention of open-drain
> outputs. Is this for some kind of wired-OR equivalent
> operation? Are there are terminating resistors?
Most PCI signals are bi-directional but some are uni-directional (clock, =
reset, request, grant, interrupts). And there are a few open-drain =
outputs. See section 2.2.*. You could use bi-directional buffers for =
all, assuming they meet the electrical and timing specs. Even the =
uni-directional signals sometimes need to go hi-Z.
The system error (SERR#) and INTerrupt lines are open-drain and CAN be =
wire-OR'd on the motherboard, or not. Pull-up resistors are provided on =
the motherboard.
There are no terminating resistors in the sense of S.I. terminations, =
but many signals use weak pull-up resistors. There are clamp diodes, =
which do perform somewhat of an energy termination function, built into =
every active device on the bus.
Note that bi-directional signals are not allowed to monitor their own =
outputs while driving. They must have an internal path that bypasses =
the output/input buffers.
REQ# (and GNT#) are allowed to be half-strength drivers, but I don't =
know if anyone actually does this.
> 4) There are 3.3V pull-up and pull-down curves and=20
> other AC and DC specs in the rev. 2.2 document. Is=20
> this information complete enough to design PCI I/O?
Basically, if you meet the AC and DC and timing specs that are in the =
document, you should be OK electrically. Slower slew rates are =
preferred. PCI tends to be a noisy bus; lots of ringing and overshoot.
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