Hello, We are just beginning a task to design PCI compliant I/O. In addition to pouring over specifications I would greatly appreciate if anyone could offer answers for the following questions. We have designed full swing CMOS input, output, tri-state and bi-directional output buffers in the past and have done many other I/O and signal-integrity related projects. So we are looking for PCI specific information only. Here's the questions: 1) We have the PCI Local Bus Rev 2.2 spec. Are there any other spec's/app notes that will be of use? 2) The CMOS technolgy will be 3.3V compliant but not 5 Volt compliant. Are there 5 Volt signals on the mainboard or other PCI cards that may not be compatible with our 3.3V maximum voltage requirement? 3) What is/are the basic I/O? For example are all I/O the same bi-directional design or are there input-only and output-only buffers? I've seen mention of open-drain outputs. Is this for some kind of wired-OR equivalent operation? Are there are terminating resistors? 4) There are 3.3V pull-up and pull-down curves and other AC and DC specs in the rev. 2.2 document. Is this information complete enough to design PCI I/O? Thanks in advance, Mike ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu