The job description is listed bellow. Thanks Gus SPARC SERVER SYSTEMS SIGNAL INTEGRITY ENGINEER Oracle Systems SPARC Development Engineering is chartered with delivering SPARC-based rack and blade server systems, in short time-to-market and with world-class quality. As part of SPARC Volume Systems East the applicant will be involved in developing the next generation of the T-series Volume Rack Server products. These systems utilize cutting edge technology to deliver record-breaking performance, simplified management and cost-saving efficiencies. Our organization is looking for senior, highly motivated, dedicated team members to do electrical hardware signal integrity for these server products. Signal Integrity engineers participate in all phases of the PCBA/System life cycle including: - Initial Concept/Architecture - Simulation/Correlation of high speed passive channels - Creation of design rules, driving physical layout and review - Bringup and validation of PCBAs, respins, adjustment of rules as needed. - Final report and customer shipment Oracle SPARC server contain a variety of cutting edge technology, engineers will have broad opportunity to interact with: - High speed SERDES internal busses - I/O interfaces - Processor interfaces - Digital and analog power systems Brief Posting Description Evaluates reliability of materials, properties and techniques used in production; plans, designs and develops electronic parts, components, integrated circuitry, mechanical systems, equipment and packaging, optical systems and/or DSP systems. Detailed Description Responsible for designing, developing, modifying and evaluating electronic, electro-mechanical or mechanical components, assemblies or integrated circuitry for hardware systems for the external market. Includes new design, as well as modification activities that results in significant product enhancement. Activities encompass design, analysis, testing and process development using engineering principles and methods. Technical disciplines may include electrical and logical design of printed circuit boards or integrated circuits; mechanical design of electronics enclosures or integrated circuit packaging; and embedded software/firmware design. Job Requirements Duties and tasks are varied and complex needing independent judgment. Fully competent in own area of expertise. May have project lead role and or supervise lower level personnel. BS or MS degree or equivalent experience relevant to functional area. 4 years of engineering or related experience. Additional Details Ideal candidates will have: - Bachelors, Masters or Ph.D in Electrical Engineering or Computer Systems engineering - 7 to 10 years relevant experience in Signal Integrity - Experience with Printed Circuit Board design, stackup and assembly process - Background in high-frequency design techniques. - Experience analyzing and optimizing passive channels in both time and frequency domain - Experience with high speed simulation tools and field solvers (ADS, CST, HFSS, MATLAB) - Ability to perform multi GB/s VNA measurements - Familiar with N-port Network analysis (S-parameters, ABCD-parameters, Z, Y-parameters - Experience supplying rules/requirement to faciliate PCB layout, ability to review - Experience mentoring junior engineers - Familiar with Cadence Allegro schematic capture and layout tools ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List forum is accessible at: http://tech.groups.yahoo.com/group/si-list List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu