[SI-LIST] Re: Moat and drawbridge
- From: Guasti Giovanni <Giovanni.Guasti@xxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Wed, 10 Mar 2004 12:28:32 +0100
Hi Chris,
I would like to tell our experience with moat and bridges made some years
ago:
I had just red a book of M. Montrose, in which this idea was well explained.
So we made a commercial PCB whith a moat and a bridge in.
First we found a lot of problem in drawing nets without crossing the moat.
Then we didn't succeed in having less noise on GND-inside-moat and
GND-outside-moat.
We had a lot of EMI-EMC and crosstalk problems.
As we changed from the bridge+moat case to that one with a wide, entire GND
plane all problems disappeared, specially EMC.
We made some simulation with HFSS and we noticed that in some cases a moat
can really make a filtered area, it is able to mask a punctiform noise surge
outside or inside, but this is not true everywere on the PCB: there are some
regions of the PCB where noise grows, or where new specular surges of noise
appear.
Then, if you want to draw all the nets on the bridge, you'll find some xtalk
effects, because the bridge has to be narrow and nets are many...
So I think that moat cannot be a simple way to reduce noise, or at least,
you should perform a good simulation before drawing the moat. But this
simulation is complex for many reasons, for example it's often impossible to
represent all the most important noise surges.
And when the time-to-market is pressing, I think that an entire, old GND
plane is a good choice.
By,
Giovanni
(sorry for my terrible English)
>
> > -----Original Message-----
> > From: si-list-bounce@xxxxxxxxxxxxx
> > [mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Chris Chalmers
> > Sent: Tuesday, March 09, 2004 9:37 AM
> > To: si-list@xxxxxxxxxxxxx
> > Subject: [SI-LIST] Moat and drawbridge
> >
> >
> > SI-list,
> >
> > I have seen on a number of designs a moat and drawbridge
> > arrangement to protect sensitive components from noise on
> > planes and to make sure that all signals going out from the moat
> > have a direct return path under them.
> >
> > However, I have also seen some designs that incorporate around
> > 4 switchers on a board that are laid out in a moat and drawbridge
> > arrangement to isolate them from the rest of the board.
> > Here is a small diagram of the arrangement
> >
> > ****************************
> > * | chip 1 chip2 | *
> > * | | *
> > * | chip 3 chip 4 | *
> > * ________________ ___| *
> > * *
> > * rest of *
> > * board *
> > * buf1 *
> > ****************************
> >
> > The switchers (chips 1-> 4) are contained in a moat that is
> > totally isolated
> > from the
> > rest of the board apart from the drawbridge (the space below chip 4).
> > There is a spilt through all the layers around this moat apart from at
> > the drawbridge. There are no tracks that cross the moat area that
don't
> > cross the drawbridge.
> >
> > My question is, is this a good thing to do? Can I give an example.
> > If you where supplying current to component BUF1 (which is just a buffer
> > supplied by chip 1)would you not be increasing the loop area going
> > from its supply Chip1 across the drawbridge and down to buf1 rather than
> > just going straight down to buf1 on a plane if the moat and drawbridge
> > layout was not there. Is the moat and drawbridge layout only for a
> > small analog area rather than for trying to contain all the switching
> > noise of the power supply.
> >
> > Your comments would be much appreciated, Thanks
> >
> > Chris
> >
>
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