[SI-LIST] Moat and drawbridge
- From: "Chris Chalmers" <cchalmers@xxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Tue, 9 Mar 2004 16:36:44 -0000
SI-list,
I have seen on a number of designs a moat and drawbridge
arrangement to protect sensitive components from noise on
planes and to make sure that all signals going out from the moat
have a direct return path under them.
However, I have also seen some designs that incorporate around
4 switchers on a board that are laid out in a moat and drawbridge
arrangement to isolate them from the rest of the board.
Here is a small diagram of the arrangement
****************************
* | chip 1 chip2 | *
* | | *
* | chip 3 chip 4 | *
* ________________ ___| *
* *
* rest of *
* board *
* buf1 *
****************************
The switchers (chips 1-> 4) are contained in a moat that is totally isolated
from the
rest of the board apart from the drawbridge (the space below chip 4).
There is a spilt through all the layers around this moat apart from at
the drawbridge. There are no tracks that cross the moat area that don't
cross the drawbridge.
My question is, is this a good thing to do? Can I give an example.
If you where supplying current to component BUF1 (which is just a buffer
supplied by chip 1)would you not be increasing the loop area going
from its supply Chip1 across the drawbridge and down to buf1 rather than
just going straight down to buf1 on a plane if the moat and drawbridge
layout was not there. Is the moat and drawbridge layout only for a
small analog area rather than for trying to contain all the switching
noise of the power supply.
Your comments would be much appreciated, Thanks
Chris
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