[SI-LIST] Looking for a Job as SI/Simulation Engineer.

  • From: Ravi G <ping_ravindra@xxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Mon, 25 Aug 2003 09:41:35 -0700 (PDT)

Hi All,
I am looking for employment as a SI/Simulation Engineer. Please let me know if 
you have or know of any opening. Attached is my latest resume.

Best Regards,
Ravi.
 
 
RAVINDRA R.GALI
______________________________________________________________
2015 Cedar Bend Drive, Apt # 843.                        Phone: 512-339-4503
Austin, TX 78758                                                  email: 
ravindra_gali@xxxxxxxxxxxx
 
Objective
Seeking a challenging full time engineering, research and development position 
in the electronics industry with a strong emphasis in Signal 
Integrity/Simulation.
 
Summary
A highly motivated, team-oriented professional with over 3 years experience in 
Signal Integrity with Giga Hz signaling, layout techniques, development of 
routing guidelines, simulation tools, and measurement techniques. I also, have 
a solid background in electromagnetics, transmission lines and circuit theory. 
 
Experience
Dell Inc., Austin, Texas
Simulation Engineering Advisor, 6/2000 - 8/2003
Simulation Lead for Optiplex GX240/GX260/GX270 and yet to be released Precision 
workstations. SI representative in weekly conference calls with various 
vendors. Provided SI updates on a weekly basis in the technical, 
cross-functional meetings. In the capacity as SI lead, I produced the SI 
schedule document to track SI deliverables and issues, escalated issues 
affecting the project schedule to upper management, resolved the issues and met 
project deadlines.
* Other duties included:
· Performed pre- and post-layout signal integrity analysis and simulation on 
PCI Express 
  using HSPICE. Performed Worst Case Loss, Jitter, AC/DC Common mode analysis 
to 
  develop layout guidelines. 
· Performed signal integrity, crosstalk, timing analysis for FSB (Front side 
bus), AGP 8X
  (Accelerated graphics port) using SPECCTRAQuest.
· Procured IBIS models and performed model verification using Model Integrity 
to ensure  
  accuracy and stability of use.
· Guided layouts for placement, routing topology, power planes, layer usage, 
etc.
· Delivered design rule sets to CAD for various interfaces like FSB, DDR, AGP, 
Clocks, 
  PCI Express, USB, SATA, etc.
· Worked with teammates to design stackups to meet impedance, power integrity, 
EMI 
  and manufacturing requirements.
· Developed SI validation test plans, took measurements with TDR analyzers, 
  Oscilloscopes to verify signal quality and timing in the lab.
· Worked with the EA (Electrical Analysis) lab technicians to ensure they 
understood the 
  validation test plan, oversaw test execution and offered explanations when 
needed.
· Interfaced with hardware engineers, EMC, and CAD designers to implement 
solutions.
· Evaluated and provided feedback on various CAE tools on integrating into the 
design 
  environment. Interfaced with tool vendors on a regular basis to upgrade tool 
features.
· Mentored new engineers from Dell CDC (China Development Centre) on design 
  rule development and high speed board design.
· Developed training modules on design rule development using 
Allegro/SpecctraQuest.
 
Worked as the Simulation Lead for Inspiron 8100/8200 Notebooks.
* Interfaced with the OEM vendors located overseas on a regular basis.
· Reviewed and provided feedback on layout, simulation reports, validation test
  plans, design rules etc.
 
Worked with cross-functional teams on integrating a Bluetooth module across the 
entire line of Latitude Notebooks.
* Simulated the Antenna field patterns using FLO/EMC.
· Correlated the simulated data by using a Network Analyzer.
· Performed throughput measurements in semi anechoic chamber.
· Provided feedback on improving the performance of antenna by modifying the 
chassis 
  surrounding the module.
 
New Mexico State University, Las Cruces, New Mexico.
Graduate Teaching Assistant, Department of Electrical Engineering, 8/1998 ? 
5/2000
Taught and supervised Sophomore/Junior laboratory classes including: Computer 
Engineering, AC Circuits, Electronics - I, Introduction to DSP.
* Duties included: 
· Grading 30 - 40 Lab reports per week.
·  Helping students in coding and debugging in the C programming lab.
·  Review Projects, SPICE simulations and identified areas that needed 
correction for 
   obtaining proper results.
 
Surana Telecom, Hyderabad, India
Intern, 5/1996 ? 8/1996
· Gained experience by working with Fiber Optic Power Meters, Optical TDR in 
testing
 optical fibers.
· Gained good insight in the manufacture of optical fibers.
 
Academic projects
· Designed and implemented a 16X16 pipelined multiplier.
Languages: Verilog
Tools: Modelsim, Xilinx ISE, Synplicity, XS4010XL Board
The design interfaces a VGA monitor to display the result in hexadecimal 
format. The input is given in hexadecimal format using a keyboard. A VGA 
controller was developed using Xilinx XC4000 FPGA board that acts as an 
interface between the keyboard and the monitor.
 
· Designed a 16 bit CPU
Language: Verilog
Tools: Modelsim, Autologic
This project involved design, simulation and layout of a 16 bit CPU. The 
project comprised of design and simulation of all the basic instructions in a 
CPU using Modelsim, layout using Autologic.
 
Computer/Tool Skills                 
Software Languages  : C, C++, Visual Basic.
Hardware Languages : IBIS, Verilog, Assembly Language for 8085/8086, DSP 5630X
Operating Systems     : UNIX, Solaris, Linux, Windows 95, 98, 2000/NT.
Signal Integrity Tools   : SPECCTRAQuest, HSPICE, ApsimSPICE       
EM Modeling Tools     : HFSS, FLO/EMC, Maxwell 2D/3D, ApsimRLGC, 
                                   PolarSi8000m                                 
                                            
PCB Layout Tools       : Allegro
Synthesis Tools          : XST, Synplicity
Simulators                  : Modelsim
Other CAE Tools         : Model Integrity, Matlab, Hyperlynx, CosmosScope, 
AvanWaves,
Office Tools                 : MS Office 
Bus Protocols             :  PCI, PCI-X, PCI Express, DDR, USB, InfiniBand, 
TCP/IP
 
Education
Master of Science, Electrical Engineering, 8/1998 ? 5/2000
New Mexico State University, Las Cruces, NM.
 
Bachelor of Technology, Electrical Engineering, 6/1994 ? 5/1998
Kakatiya Institute of Technology and Science, Warangal, India.
 
Continued Professional Training includes:
· High Speed Board Design, GTL 250, with Dr. Eric Bogatin, 2001
· Signal Integrity Design Solutions 2001 by Cadence
· EMI/EMC Computational Modeling for Real World Engineering Problems, with
  Dr. Bruce Archambeault, December, 2000
· Printed Circuit Board Design for Real-World EMI Control, with Dr. Bruce 
Archambeault,
  December, 2000
· High Speed Digital Design, with Dr. Howard Johnson, September, 2000
· Mindshare classes on USB, InfiniBand 
· Ansoft Spicelink Training
· Agilent High Frequency Measurement Seminar
· Signal Integrity seminar by TDA/Tektronics
 
Honors
· Secretary, Indian students Association, New Mexico State University, 1998 ? 
1999
· Ranked in the Top 0.4%, All India Graduate Aptitude Test in Engineering, 
6/1998
 
Interests
Cricket (was captain of the NMSU team in 1999 ? 2000)




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