[SI-LIST] AW: Re: (no subject)

  • From: mathias.borcke@xxxxxxxxxxxx
  • To: si-list@xxxxxxxxxxxxx
  • Date: Mon, 25 Aug 2003 17:25:37 +0200

The DDR2 spec eg. see:
http://www.samsung.com/Products/Semiconductor/DRAM/DDR2SDRAM/DDR2SDRAMco=
mpon
ent/512Mbit/K4T51083QM/512M_M_DDR2_Samsung_Spec_rev0.92.pdf

On Page 78 the reference load (25R || 0pF) and timing reference point =
(at
DUT) is defined.
Whatever capacitive/resistive load you use in your system you will need =
to
estimate the RC-delay from the DDR2 Off-Chip-Driver Ron (nominal 18R @ =
0.3V
resp. 1.5V) and your complex load.

Regards
Mathias

-----Urspr=FCngliche Nachricht-----
Von: stephanie.goedecke@xxxxxxxxxxx =
[mailto:stephanie.goedecke@xxxxxxxxxxx]=20
Gesendet: Montag, 25. August 2003 12:28
An: si-list@xxxxxxxxxxxxx
Betreff: [SI-LIST] Re: (no subject)


Hi CKW,

I don't know that you want the capacitance to be specified, as this =
would
greatly limit design options.  I don't think the resistance is =
specified
either.

The scope section of JEDEC Standard 8-9 (SSTL 2.5V) says:

"Actual selection of the resistor values is a system design decision =
and
beyond the scope of this standard."

This might be similar with the 1.8V version?

I recommend you select these values based on what gives the best =
signaling
and timing margins in the design.

best regards,
Stephanie




=20

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                                                   To:
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                                                   cc:   (bcc: =
Stephanie
Goedecke/STN/SC/PHILIPS)        =20
                                                   Subject:    (no =
subject)

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               "ckw1972"                           Classification:

               <ckw1972@xxxxxxxxxxx>

=20

               Sent by:

               si-list-bounce@freelists

               .org

=20

               2003-08-22 02:48 AM

               Please respond to

               ckw1972

=20

=20





Hi,

I've a question on the DDR-II SDRAM (SSTL-18 class-II) spec as below, =
can
someone help me to understand this correctly? Thanks in advance.

1. Why they is no clear capacitance load spec specify on the memory =
spec?
    For example, samsung 512M 200Mhz DDR-II SSTL-18 class-II device
datasheet
    only specify their AC load reference is just connect DQ pin to Vtt =
thru
one 25ohm
    resistor. My understanding on this is with Cload=3D5pF & =
Cload=3D0pF will
impact on
    the 200Mhz performance quite significantly.


Thanks
Regards,
CKW

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