[SI-LIST] Re: LVDS center tap capacitor termination
- From: "Ummalaneni, Venu Babu (Venu)" <venubabu@xxxxxxxxx>
- To: "steve weir" <weirsp@xxxxxxxxxx>, "shekhar sharma" <sinnovate88@xxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Mon, 30 Aug 2004 16:35:11 +0530
Steve,
Thank you very much. Now I got it correctly.
Best regards,
Venu Babu.
-----Original Message-----
From: steve weir [mailto:weirsp@xxxxxxxxxx]=20
Sent: Monday, August 30, 2004 4:25 PM
To: shekhar sharma; Ummalaneni, Venu Babu (Venu); si-list@xxxxxxxxxxxxx
Subject: Re: [SI-LIST] Re: LVDS center tap capacitor termination
You are right that it terminates both modes. You just have the modes=20
confused. Even is the common mode, odd is the diff. mode. The AC=20
termination is to the even mode.
Steve.
At 11:37 AM 8/30/2004 +0100, shekhar sharma wrote:
>Two resistor with centre tap capacitor termination
>provides AC termination to odd-mode impedance which
>terminates common mode signal.
>May I right ???
>
>Shekh
>
>
> --- steve weir <weirsp@xxxxxxxxxx> wrote:
> > The two resistor termination is a double
> > single-ended termination. The
> > single resistor termination presumes a virtual
> > ground at the center of the
> > resistor.
> >
> > What noise sources do you think LVDS is trying to
> > reject?
> > What noise sources do you think LVDS can reject?
> > What noise sources do you think LVDS cannot reject?
> >
> > Steve.
> > At 03:34 PM 8/30/2004 +0530, Ummalaneni, Venu Babu
> > (Venu) wrote:
> > >Hi=3D20
> > >
> > >This query is regarding termination schemes at the
> > LVDS receiver inputs.
> > >
> > >Can some one explain me the difference between a
> > 'single resistor
> > >termination' and 'the two resistors with center tap
> > capacitor' ?
> > >
> > >I read some where that the 'center tap capacitor
> > scheme' filter's the
> > >common mode noise. My doubt is that even in 'single
> > resistor scheme'
> > >also if we run the differential traces verly
> > closely the common mode
> > >noise pick-up by the two traces is equal and the
> > Receiver can reject
> > >this common mode part, right? So why we need to go
> > for center tap
> > >capacitor scheme? It unnecessarily increase the
> > component count on the
> > >board, right?
> > >
> > >Any inputs are appreciated.
> > >
> > >Best regards
> > >Venu Babu.
> > >
> >
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