[SI-LIST] July 16 Submission Deadline for EPEPS (Electrical Performance of Electronic Packaging and Systems)

From: Dale Becker <wbecker@xxxxxxxxxx>
To: si-list@xxxxxxxxxxxxx
Date: Wed, 7 Jul 2010 22:05:36 -0400
Dear si-listers,

Just a reminder that the paper submission deadline for the 19th EPEPS
conference is July 16. The conference this year is held in Austin Texas
from October 24-27.

Information and links for paper submission and conference registration are
at http://www.epeps.org.

EPEPS is the premier international conference on advanced and emerging
issues in electrical modeling, analysis, synthesis and design of electronic
interconnections, packages and systems. It also focuses on new
methodologies and CAD/design techniques for evaluating and ensuring signal,
power and thermal integrity in high-speed designs. EPEPS is jointly
sponsored by the IEEE Components, Packaging and Manufacturing Technology
Society and IEEE Microwave Theory and Techniques Society. Authors are
invited to submit papers describing new technical contributions related to
the broad area of electrical performance of high-speed designs, covering:
   1. Emerging and advanced issues,
   2. New design techniques and innovative architectures for design and
      management,
   3. Novel CAD concepts, methodologies and algorithms for modeling,
      simulation and optimization,
 with emphasis on:
 System-level, board-level and on-chip interconnects
 High-speed channels, links, backplanes, serial and parallel interconnects,
 SerDes
 Multiconductor transmission lines
 Memory and DDR interfaces
 Jitter and noise management
 Signal and thermal integrity
 Power integrity and power distribution networks (PDNs)
 Electronic packages and microsystems
 3D interconnects, 3D packages, TSVs and MCMs
 Nano interconnects and nano structures
 RF/microwave packaging structures, RFICs, mixed signal modules and
 wireless switches
 Package-chip co-design
 Electromagnetic (EM) and EM interference modeling, simulation algorithms,
 tools and flows
 Macromodeling including model order reduction as it applies to electrical
 analysis
 Advanced and parallel CAD techniques for signal, power and thermal
 integrity analysis
 Measurement and data analysis techniques for system-level and on-chip
 structures.
Submission Deadline: July 16, 2010, 8pm, PST
Submission Format: 2 column, 4 page, PDF format only.
Information for authors can be found at http://www.epeps.org. Submitted
manuscripts should be camera ready and compliant with the general standards
of the IEEE, including appropriate referencing. Noncompliant manuscripts
will not be considered for review.


2010 Co-chairs: Dale Becker, IBM, and Ram Achar, Carleton University

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[SI-LIST] July 16 Submission Deadline for EPEPS (Electrical Performance of Electronic Packaging and Systems)

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