[SI-LIST] Job Opening - SI CW Position

  • From: "Ma, Samuel E" <samuel.e.ma@xxxxxxxxx>
  • To: <si-list@xxxxxxxxxxxxx>
  • Date: Wed, 30 Aug 2006 17:26:19 -0700

We're a hardware/platform design group at Intel.  We're looking for a SI
CW (temporary assignment, 4 - 5 months in duration), with moderate
experience level.  The candidate will perform system measurements in the
lab (on high-speed serial differential buses, as well as single-ended
buses such as FSB), then conduct correlation simulations (mainly using
HSPICE), and compare w/ measured results.  This is an IMMEDIATE OPENING!

We're located in Santa Clara, CA, and the candidate will be required to
work on-site.  40hrs/wk

Below is a description of qualifications for the position:
* Extensive lab measurement experiences a MUST! Need to be very
comfortable using high-bandwidth analog oscilloscopes (8GHz+), must be
fully aware of the precautions necessary before measuring a multi-GHz

* HSPICE experience is a MUST! Need to be very comfortable with HSPICE
syntax, able to create a spice deck from scratch, know how to work with
IBIS and HSPICE behavioral or transistor models.

* Good understanding of basic SI fundamentals, such as lossy
transmission lines, crosstalk, reflections, etc...

* Know fundamentals about board design, impact of stackup, placement,
trace geometries, etc...

* Knowledge of basic usage of Cadence Allegro (or Physical Viewer), be
able to navigate within a .BRD file, and locate nets/pins for probing

* Be a self-starter and good team player.

* HIGHLY desired (nice-to-have) skills:
* Experience with correlating simulation results against lab

* Know how to modify/create Perl scripts

* Knowledge of Pentium 4 FSB topology and its timing & signal quality
requirements; as well as requirements for standard high-speed serial
differential buses

If you believe you qualify, please send your resume directly to my email


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