[SI-LIST] Hyperlynx Results interpretation
- From: Erin.McPhalen@xxxxxxxxxxxxxxxxxxxxxxxxx
- To: si-list@xxxxxxxxxxxxx
- Date: Wed, 30 Aug 2006 15:52:03 -0700
Hi
I had a couple of questions of interpreting the results from Hyperlynx if
any of the experts out their may know the answer or point me to the
answer.
1. Does Hyperlynx simulate the ESD protection diodes through the
ground/vcc clamp parameter in the IBIS model or is it omitted to show real
levels in the trace. I ask this, because if they do then the levels of
overshoot/undershoot would likely be higher and other ICs could be
buffering other parts by clamping the waveform before it exceeds their
min/max specification.
2. Using the oscilloscope in Hyperlynx they give the current waveform in
the CSV output file. Is this the current measured in the trace connecting
to the driver, or is it the current that is actually entering the
protection diodes/parasitic capacitance of the part?
Sorry, if this questions seem trivial. I want to make sure that when I
see overshoot/undershoot that I correctly interpret the levels to make
recommendations.
Any other information on interpreting/using Hyperlynx for SI application
would be greatly appreciated.
Erin McPhalen
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