[SI-LIST] Interconnect Model for J971 (100MHz) Teradyne
- From: "Church, James" <jchurch@xxxxxxxxxxx>
- To: "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
- Date: Thu, 1 Dec 2011 11:59:09 -0500
Does anyone have an interconnect model lying about for a J971 Teradyne VLSI
Tester (circa 1995)?
Generating my own will take some time.
Regards,
James Church
Rockville Design Center
Rochester Electronics, Inc.
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