Chris, the closed loop transfer function gives the VRM its phase shift versus frequency. The VRM typically has multiple poles. One of the poles is to effect an integrator transfer function for very high DC gain, and another is either the open-loop transfer function of the error amplifier in a linear VRM, a single effective pole from a current mode SMPS, or two poles from the LC output filter in a voltage mode SMPS. Most SMPS have operated in current mode rather than voltage mode for the past twenty three years or so. The error amplifier does not have to be set-up this way, but this has proven very cheap and effective. The feedback loop must close the gain at 0dB while there is still phase margin to 180 degrees to prevent oscillation. A VRM usually approaches 0 dB to within 5-10dB on a -2 slope, and then cuts back to a -1 slope to stably cross 0dB. At some point beyond 0 dB the phase can rapidly fall away to 180 degrees or more. This means that the impedance is on the complementary slope of +2, and then goes to +1 near 0dB where the phase will actually be more like 135 degrees than 90 degrees lagging as with a simple inductive characteristic. Where the decoupling network needs to transition from the VRM depends on how much greater the VRM open loop impedance is than the system target impedance. Many modern VRMs have bandwidths into the 100's of kHz, and some linear regulators even into the low MHz, particularly if they have to support the current generation of power thirsty processors. In an SMPS, the switching frequency sets the upper limit on frequency response. Clearly, the loop cannot effect average voltage changes in a single cycle. If we apply Nyquist, we are limited in the best case to Fsw/2. However, typically, the feedback loop closes at 1/5th the switching frequency or less. Steve. At 09:10 AM 3/22/2004 +0000, Chris Chalmers wrote: >Si List, > >Here's a question that has been burning my brain cells. > >The effective operating frequency for a Voltage Regulator >module in the PDS is from DC to a few hundred hertz. Then the > bulk capacitors take over from there to 1 MHz. The VRM becomes > inductive above a few hundred hertz. My question is, what makes > the VRM look inductive? Is it the package of the device that > is so inductive at 1MHz that the impedance begins to go above the > target system impedance or is it that the bandwidth of the error > amplifier inside is only in the hundred of kilohertz. > >If it is the error amplifier then why don't they increase the > bandwidth of it and reduce the inductance of the package to > reduce the need for bulk capacitance. > >Also if it is just the inductance of the package, if you put a > 1MHz sine wave through it (from the die to the point of load > would the 1MHz signal rise be slewed due to the inductance that > much? > >Thanks in advance > >Chris > > >********************************************************************** >This communication contains information which is confidential >and may also be privileged. It is for the exclusive use of the >intended recipient(s). Please note that any unauthorised >distribution, copying or use of this communication, or the >information in it, is strictly prohibited. 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