[SI-LIST] Re: ISI
- From: jeff_latourrette@xxxxxxxxxxx
- To: ikhan@xxxxxxxxxxxxxxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Mon, 12 Aug 2002 10:43:48 -0600
Ibrahim:
I found a pretty good description in the following Agilent White Paper, "Jitter
Measurements of Agilent Technologies OC-48 Optical Transceivers using the
OmniBER718", by Nicolas Schmitt. Section 2.2
I've pasted the relevant portion here, minus figure 2, and the url, as well:
2.2 Sources of Jitter
Duty Cycle Distortion (DCD) is the difference in the mean
pulse width between a logic "1" and a logic "0". Variations
of the mean pulse width cause DCD and directly impact
significant instants from the ideal position in time by
affecting their phase.
Inter Symbol Interference (ISI) refers to variations of the
significant instants (i.e. the ideal position in time for the
signal to arrive) due to Data Pattern Dependent (DPD)
jitter. It is a leading cause of signal degradation as peak
amplitude, rise and fall time are affected. Ultimately, ISI
becomes the limiting factor for signaling rate and
transmission distance as clock and data recovery circuits
cannot cope with the excessive amount of jitter induced by
DCD.
Figure 2 illustrates the effects of ISI and DPD on a digital
signal. When different bit sequences are transmitted,
variations of the peak amplitude, rise and fall times are
observed. These variations can be related to the frequency
content of the bit sequence propagating through the
transmission media and is affected by many parameters such
impedance matching, capacitance, inductance and
dispersion. ISI can be minimised by careful layout and
composition of a board and it is important to address these
issues early in the design especially at higher data rate.
http://ftp.agilent.com/pub/semiconductor/morpheus/docs/jitter_measurements2.pdf
Hope this helps you.
-----Original Message-----
From: Ibrahim Khan [mailto:ikhan@xxxxxxxxxxxxxxxxxxx]
Sent: Sunday, August 11, 2002 6:31 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: ISI
Doug,
Thanks for the simple and easy to understand reply. Have you seen any
articles etc. on the subject to dig deeper.
Regards
Ibrahim
-----Original Message-----
From: Douglas Burns [mailto:dburns@xxxxxxxxxx]=20
Sent: Sunday, August 11, 2002 12:52 PM
To: Ibrahim Khan
Cc: si-list@xxxxxxxxxxxxx
Subject: Re: [SI-LIST] ISI
Ibrahim,
If you think of each bit of data as a "Symbol",then inter-Symbol
Interference (ISI) is the effect preceeding symbols have on the current
symbol.
ISI is caused when a symbol is driven before the network has settled
from a previous symbol. This means that the new symbol is being driven
from a different operating point than other symbols. ISI can be
predicted by deteriming the settling time of the network in question. A
simple simulation of a single edge driving your network will give you
the network settling time (or you could estimate just by looking at the
total network length.
To avoid ISI,You must operate your network such that you never drive
faster than the network settling time. In general,this is impractical
and you need to setup your simulation environment to identify the
affects ISI will have on your circuit.
Doug
Douglas Burns
Signal Integrity Software, Inc.
6 Clock Tower Place
Maynard,MA 01752
www.sisoft.com
> SI Gurus,
>
> Can you please explain in simple term what is:
>
> 1. Inter-Symbol-Interference
> 2. How to predict (based on the data sheet etc) that we will encounter
> ISI 3. How to avoid it
>
> Any literature out there that will explain it.
>
> regards
> Ibrahim Khan
>
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