Hi All, I am looking for feedback on how to accurately create an IBIS file for a multi-chip package. I have a device with several die on a single substrate, and my concern is that simply lumping the package and driver parasitics will not represent the substrate routing traces well enough. For discussion purposes, assume the device package is a BGA containing two die on a common substrate. Both die are connected in parallel, with most signals going from the ball through a 1" trace to the die. Some signals are star topology, some are daisychain. For reference, the device is intended for clock speeds of 100-200MHz, with very wide bus synchronous data transfers. Options include: (a) Single IBIS file for complete package (preferred) with lumped parasitics and ignoring substrate routing traces (b) IBIS of each die with recommendations on external transmission lines (substrate) to connect them (c) Combination of IBIS of each die with Spice model of substrate (d) ? Any opinions, tradeoffs, recommendations are appreciated. Thanks, AAron ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu