[SI-LIST] Re: How to simulate length mismatch of PCB traces
- From: "yc2158" <yc2158@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Thu, 30 Mar 2006 01:44:27 -0000
Steve,
Thanks for your reply. I should clarify my question with Hspice W
model as follows:
in1 --------------------- out1
in2 --------------------- out2
in3 --------------------- out3
|<---length=3D10cm---->|
W1 N=3D3 in1 in2 in3 gnd out1 out2 out3 gnd RLGCMODEL=3Dex_rlgc l=3D10cm
Here I want to change the length of (in1,out1) to 10.1cm and the
others are the same length (10cm). If then, I think it is hard to
specify the different lengths for each line with W model.
Hope this would clarify my question.
Yongjin
--- In si-list@xxxxxxxxxxxxxxx, steve weir <weirsi@...> wrote:
>
> YongJin, if I understand you correctly, you would like to see skew
> effects from lines with mismatched lengths. Just build a SPICE
> simulation with different W elements of like impedance but different
> lengths. Alternatively, you can just calculate the timing difference
> from the material effective eR and the length offset.
>
> Steve.
> At 12:38 PM 3/29/2006, YongJin CHOI wrote:
> >Dear SI members,
> >I am looking for a simple simulation method to get a
> >rough idea if one or two of the four traces is a
> >little bit longer like 1~2mm. The transmission line
> >models I am having are W-model from Hspice field
> >solver(2-D) and S-parameter model from HFSS. I can use
> >Hspice or Spectre depending on the simplicity.
> >Any comments would be appreciated.
> >Thanks,
> >
> >Yongjin CHOI
> >
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