Thanks for your information in the first. The value of propgationdelay should be longer than settledelay and switchdelay theoretically,in fact ,I know the reason is that the load of the circuit is lower than the test load, however, how to compensate the result of the simulation . Thanks! ----- Original Message ----- From: "Benny Yan" <bennyzhi@xxxxxxxxx> To: "Zhang Haitao" <zhanght@xxxxxxxxxxxxxxx> Cc: <si-list@xxxxxxxxxxxxx> Sent: Monday, August 14, 2006 12:32 PM Subject: [SI-LIST] Re: How to compensate the result if the flight time is a negative value?Thanks! > Haitao: > It seems that the prop delay is too small, do you get the right package > models for your simulation? > Or the routing trace may be too short, hence will cause hold time issue, I > think the simplest way is to route longer. > Benny. > > > On 8/14/06, Zhang Haitao <zhanght@xxxxxxxxxxxxxxx> wrote: >> >> Dear Benny Yan, >> >> >> >> I want to know what can I deal with it if the flight time is a negative >> value. >> >> for example,I do a simulation with >> >> >> >> the value of propdelay is 0.399837 ns >> the values of switchdelay and settledelay are -1.3389 ns and -0.7431 ns. >> >> >> >> I know the reason is that the load of the circuit is lower than the test >> load, however how to compensate the result of the simulation . >> >> >> >> Zhang Haitao >> >> Thanks a lots! >> >> >> ----- Original Message ----- >> From: "Benny Yan" <bennyzhi@xxxxxxxxx> >> To: <zhanght@xxxxxxxxxxxxxxx> >> Cc: <si-list@xxxxxxxxxxxxx> >> Sent: Sunday, August 13, 2006 9:16 PM >> Subject: [SI-LIST] Re: How to compensate the result if the flight time is >> a negative value?Thanks! >> >> >> > Is the negative flight time resulted by the prop delay minus the time to >> > test loading? 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