[SI-LIST] Re: High Speed PCB design standards
- From: Nick Paulter <paulter@xxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Sat, 10 Jul 2004 13:39:44 -0400
The IPC-2141, "Controlled impedance circuit boards and high speed logic
design," was published in 1996 as a guide to help engineers, designers, and
fabricators communicate with each other. The revised guide, the IPC-2141A,
"Design guide for high-speed controlled impedance circuit boards,"
published in 2004, maintains that goal. The document is about 50 pages long
and includes sections on the design of common transmission lines used in
PWBs, materials, fabrication considerations (lithography, machining, etc.),
design for manufacture, TDR testing, etc.
I encourage anyone interested in contributing large or small to this
document to contact myself (nicholas.paulter@xxxxxxxx) or John Perry
(johnperry@xxxxxxx) of the IPC about joining the D-21c... it's free to join
(to match your compensation). The only requirement regarding submitting
comments is to provide a suggested solution (deletions, additional text,
figures, references, etc.). All suggestions are (and were) seriously
considered by the D-21c, that is, each comment is addressed by the
committee and voted upon. Comments without corroboration (data,
observations and experience of others, etc.) were and will likely be rejected.
There is a related document, IPC-2252, "Design guide for RF/microwave
circuit boards," published in 2002, in which you may also be interested in
contributing. Contact John Perry or myself if you are.
Best regards,
Nick
N.G. Paulter, Project Leader
Pulse Metrology and Time Domain Measurements
Mail Stop 8172
National Institute of Standards and Technology
Gaithersburg, MD 20899
301-975-2405
At 06:25 AM 7/9/2004 -0700, Lee Ritchey wrote:
>All,
>
>For quite some time, I sat on the committee that was responsible for
>revising the spec to its current form. I pointed our many areas in the
>document that were not accurate and was unable to get them changed. As a
>result, I stopped working with that group.
>
>I should also point out that I spoke at length with some of the leaders at
>IPC on the need to be rigorous in the creation of documents such as this,
>again to no avail.
>
>Those who choose to use this document should know that the committee that
>revised were all volunteers who were unpaid as well as unscreened as to
>their qualifications to revise this document. I don't mean to downplay
>their hard work, but what I witnessed was quite a bit of leaving in the
>legacy stuff from the original version of the spec on the premise that it
>must be right or else it would not have been put there in the first place.
>
>I pointed out that many users of this document were going to be new
>engineers who would trust it to be accurate and, therefore, needed to be
>rigorously reviewed to insure it was truly accurate. To say, that it is
>just a guideline and leave in items that are known to be wrong or suspect
>is not right. Anywhere there is a rule of thumb or an estimate instead of
>real analytical work to support a concept is bad for us all. It means we
>won't know when we can trust a document and when we can't. That's the way
>most application notes are and it is wrong to do more of it.
>
>If Nick sees this as denigration of the work, the proper response is to
>take steps to insure the accuracy of the documents that are published.
>
>I have a very large pile of markups from my work on this document if anyone
>wants to see them.
>
>It is not my intention to slam anyone's work, but I made a commitment to a
>large number of students to respond when I felt something needed it and
>this is a document that needs such a response.
>
>If one wants to get right down to the basics, the IPC is concerned with
>fabrication and assembly of PCBs and does that very well. Stretching that
>to publishing documents on high speed design goes too far. That is simply
>not its expertise.
>
>For those on the review committee who see this as a slam, I apologize if it
>hurts your feelings, but we must be more rigorous when we are responsible
>for a document that will circulate worldwide and be taken as accurate.
>Imagine if civil engineering documents were done this way and bridges fell
>in the bay due to poor guidance. We would surely not tolerate that. Why
>should we tolerate it in electrical engineering?
>
>Lee W. Ritchey
>Speeding Edge
>P. O. Box 2194
>Glen Ellen, CA 95442
>Phone- 707-568-3983
>FAX- 707-568-3504
>
>I just used the energy it took to be angry to write some blues.
>Count Basie
>
>
> > [Original Message]
> > From: Scott McMorrow <scott@xxxxxxxxxxxxx>
> > To: <paulter@xxxxxxxx>; silist <si-list@xxxxxxxxxxxxx>
> > Date: 7/7/2004 11:13:29 AM
> > Subject: [SI-LIST] Re: High Speed PCB design standards
> >
> > Nick,
> >
> > Unfortunately, since this is not a document available for free
> > distribution, it would be impossible for someone like myself to clarify
> > the claims of either Lee or yourself, without purchasing the document.
> > It may be the Lee is referring to the previous version. It would be
> > interesting if Lee would be able to clarify his complaints with you
> > off-line and then have either one of you report back on whether there
> > are any remaining issues.
> >
> > If there is good information in the document, it needs to be known. If
> > the information is not good, then this should be clarified in a public
> > forum such as ours. This in no way denigrates the work of those
> > involved in the formulation of IPC-2141A.
> >
> > best regards,
> >
> > scott
> >
> >
> > --
> > Scott McMorrow
> > Teraspeed Consulting Group LLC
> > 121 North River Drive
> > Narragansett, RI 02882
> > (401) 284-1827 Business
> > (401) 284-1840 Fax
> > (503) 750-6481 Cellular
> > http://www.teraspeed.com
> >
> > Teraspeed is the registered service mark of
> > Teraspeed Consulting Group LLC
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