I once did Matlab code to convert sparam into RLC curves and the results
match PSI General RLGC values accurately. From my experience there are some
circumstances where negative inductance can be seen:
1. When the DUT is dominated by R,C and the inductance impedance is at least
several orders smaller, the obtained inductance could show a very small,
negative value. For example, -1.2e-17.
2. The circuit topology of the DUT was not applied correctly. For example,
the DUT is dominated by shunt R,C but the RLC extractor treated it as shunt
R, L.
I would like to hear other folks to add comments revealing more conditions
that could lead to negative inductance/capacitance...
Regards,
Sherman Shan Chen
SI/PI Group, Kandou Bus
5 Queensbridge, Northampton, UK, NN4 7BF
Office: +44 1604 635826 Email: shan@xxxxxxxxxx
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx <si-list-bounce@xxxxxxxxxxxxx> On Behalf
Of Ivor Bowden
Sent: Friday, January 17, 2020 7:49 PM
To: a.v.n.kalyanram@xxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Help:Negative Loop Inductance
Akunuru Venkata Naga Kalyan Ram,
Cadence PowerSi can graph capacitance and inductance separately when viewing
extraction results as RLGC, and in some cases may display either / both as
negative at some frequencies. As I understand, interpretation of negative
inductance would be capacitive, and interpretation of negative capacitance
would be inductive. I wouldn't expect to see them both negative at the same
time. This presentation isn't generally relative, as capacitance and
inductance cancel each other. What would be more relevant is impedance along
with phase. That would say both what the impedance is and whether it is
capacitive, inductive, or neither (when at 0 degrees). For more information,
your Cadence FAE should be able to assist.
I consider PowerSi achieves reasonable results for extractions when properly
set up, but its display of results to be somewhat funky. Typically I'll take
the PowerSi SnP output file and use it for simulation with another tool,
like ADS, for more flexible display options.
Regards,
Ivor
On 1/15/2020 8:20 AM, Akunuru Venkata Naga Kalyan Ram wrote:
Hello SI/PI Altruists,
I have a question regarding Power Plane loop Inductance phenomenon. I
have a* 6'x6" board with 2 layers* (Power and GND planes) and I have
defined 2 ports , each one on each edge of the board like a edge
connector.
I am using a third party tool to do the simulation and the results
show that the *loop inductance* has a peculiar resonance below 200 MHz
and the value goes to -400 nH.
What is this phenomenon? What does the negative value of Inductance imply?
Can inductance value be negative?
Thank you in advance.
