Hello Everyone,
ANSYS is hosting free workshops on "Signal Integrity Analysis using
SIwave", at their Irvine and San Jose offices, in June.
Attendees will receive hands-on experience in computing eye diagrams using
statistical transient circuit analysis and creating automated DDR pass/fail
compliance reports for a PCB design. These workshops are recommended for
anyone implementing high-speed interfaces like DDR in their designs.
*For a detailed agenda & to register, please visit the following link*:
*Irvine, CA : *Friday, June 19th: 11:00am - 1:30pm
http://www.ansys.com/About+ANSYS/Events/signal-integrity-analysis-using-ansys-sIwave-irvine-6-19-15
*San Jose, CA : *Wednesday, June 24th: 11:00am - 1:30pm
http://www.ansys.com/About+ANSYS/Events/signal-integrity-analysis-using-ansys-sIwave-san-jose-6-24-15
Kind Regards,
-Margaret
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