[SI-LIST] Re: Eye pattern between QDR and FPGA
- From: Rotem Gazit <rotemg@xxxxxxxxxxxx>
- To: "'ikhan@xxxxxxxxxxxxxxxxxxx'" <ikhan@xxxxxxxxxxxxxxxxxxx>,si-list@xxxxxxxxxxxxx
- Date: Thu, 8 Aug 2002 19:45:25 +0300
Xilinx has very good App note (XAPP 052) describing how to implement
Pseudo-Random sequence generators, It also lists all polynomials up to 168
taps !.
Regards,
Rotem Gazit
-----Original Message-----
From: Ibrahim Khan [mailto:ikhan@xxxxxxxxxxxxxxxxxxx]
Sent: Thursday, August 08, 2002 7:13 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Eye pattern between QDR and FPGA
SI Gurus,
I need to exercise a 32 bit data bus between a QDR and an FPGA. The
data is HSTL running at 166Mhz clocked on both edges. Do I need to run
a PRBS stream on every line from FPGA to look at the eye pattern?.
Anybody has a code to generate a PRBS pattern in FPGA.
Thanks
Ibrahim Khan
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