[SI-LIST] Emc_FTT
- From: "RameshK Cozerv IN HO" <ramesh.k@xxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Thu, 14 Sep 2006 08:35:10 +0530
Hi Istvan,
You got that right,I need to slow a fast edge with a via inductance,since
iam pcb designer,I posted my query in the forum hoping to get good responses
to start with.
I did not understand the length of the via you were talking about,can you
please explain in details on the same.
Noise is coupled only after 7kv from digital input side to the secondary
side of the opto(eft test),now I need to know the exact no of vias with
sizes to suppress the noise in the primary side itself.Matter of fact, iam
also inserting inductors too in the prototype board and other with the vias
to experiment and see the result.Suggestions and advices are appreciated.
-Ramesh
-----Original Message-----
From: Istvan Novak [mailto:istvan.novak@xxxxxxxxxxx]
Sent: Wednesday, September 13, 2006 5:53 PM
To: ramesh.k@xxxxxxxxxxx
Cc: si-list@xxxxxxxxxxxxx
Subject: Re: [SI-LIST] Emc_FTT
Ramesh,
I assume you want to slow a fast edge with via inductance. The pad size has
very little effect. Drill size has also just a small impact. The biggest
impact is the actual length of via used in series to the signal between the
entry and exit traces. Next biggest contributor is the distance to the
nearest return via.
With a 2-3mm long via path you may get up to a nanohenry inductance, so
achieving 10-20nH may require a series a vias.
Regards,
Istvan Novak
SUN Microsystems
RameshK Cozerv IN HO wrote:
>
>Hi Folks,
>
>Can someone guide me,what will be the via size(Drill & Pad Size) to
>accomplish 10 to 20 nano henry drop for 5 ns rise and fall in fast
>transient time (Emc)?
>
>suggestions and advices are appreciated.
>
>-Ramesh
>
>
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please immediately delete it and all copies of it from your system, destroy any
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