[SI-LIST] Re: Differential trace Characteristic Impedance
- From: "Vincenzo Kreft-Kerekes" <vincenzo@xxxxxxxxxxxxxx>
- To: <SRogers@xxxxxxxxxxxxx>
- Date: Thu, 22 Jan 2004 11:07:04 -0500
Steve,
Quick question diverging from differential trace impedance: What distance do
these USB traces need to cover? Does running them "around the board" mean
literally around a bunch of components. What's the geometry here? Do you
have the board space to place a PHY or other receiving device direcly next
to the connector and worry about getting an 8 bit bus at some 20 Mhz around
the board instead of dealing with differential impendances at 480Mhz?
Apple's new server modules for instance have I believe two Firewire 800
(1Gb/s, .5ns edge) ports spaced far apart and one PHY on each port to avoid
routing the differential traces for long distances.
Also, when I see USB 1.1 mentioned, are you sure you don't want to use a
high-speed PHY with USB 2.0 instead? They come in much smaller packages than
USB 1.1 PHYs and your product would be as fast as USB can be for some time
to come.
Best,
Vincenzo
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Steve Rogers
Sent: Thursday, January 22, 2004 5:55 AM
To: Doug Brooks; Fred Balistreri; steve weir; mediwheel_js
Cc: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Differential trace Characteristic Impedance
First thanks for your help guys.
Taking all you have said into consideration it seems like I either need =
to use a field solver, the Ultra-cad program or guess!
While I decide on the way to go consider the following:-
1. I could space my tracks far enough so that I could use the simple =
equations from national semiconductor. This is great but how far apart =
do the tracks need to be in order that they have no affect on each =
other. Next, I would think that this approach is wasteful of board =
surface area given all the unused space between the diff tracks. This =
said there are probably some benefits of doing things this way. Theres =
bound to be somthing good about having a very small contribution of diff =
Zo made up from coupling between tracks?
2. Going the other way I can try to claw back the lost space between the =
tracks. Once I do this the diff Zo begins to drop from twice the =
isolated single track Zo value. In order to compensate I then just need =
to reduce the thickness of the tracks. This is nice as within sensible =
limits I end up with an even more narrow overall structure =
(trace-space-trace).
Of course The board house must be able to manufacture the trace and gap. =
With this approach We have the opposite situation with a large =
contribution of diff Zo coming from fringe field or coupling between =
traces (whatever you want to call it). Is this a clever thing to do? I =
would imagine that the tolerance with this approach is going to be a lot =
worse.
Any comments? =20
Steve Rogers B.Eng (Hons) C.Eng IEE
RF Design Engineer
Micromill Electronics Limited
Leydene House
Waterberry Drive=20
Waterlooville Hampshire
PO7 7XX
Tel: +44 (0) 23 9236 6600
Fax: +44 (0) 23 9236 6673
Registered No. 1456922 (England). =20
Registered Office Brook Road
Wimborne, Dorset BH21 2BJ
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