[SI-LIST] Re: Design For Manufacturing assessment Tools for PCB Designs
- From: "John Koehne" <John@xxxxxxxxxxx>
- To: <lambert@xxxxxxxxxx>, <ray.anderson@xxxxxxxxxx>, <steven.salkow@xxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Fri, 28 Apr 2006 11:14:35 -0700
Steven - We have used the Valor Enterprise 3000 software for several
years to verify hundreds of design done using Cadence Allegro layout
tools. You can verify the allegro board database as well as input gerber
files and compare them to IPC net lists. It works best if you get a
consultant to help w/ script automation & design rule checks to
streamline checking time.
If you would like additional info, feel free to contact me offline.=20
Thanks,John
John Koehne
Cadpros PCB Design, Inc.
256 Gibraltar Drive, Suite 101
Sunnyvale, CA 94089
PH# 408-734-9600 x10
FX# 408-734-9605
john@xxxxxxxxxxx
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Bert Simonovich
Sent: Friday, April 28, 2006 9:25 AM
To: ray.anderson@xxxxxxxxxx; steven.salkow@xxxxxxxx;
si-list@xxxxxxxxxxxxx
Cc: Stuart, Ken; ronald.s.wong@xxxxxxxx
Subject: [SI-LIST] Re: Design For Manufacturing assessment Tools for PCB
Designs
Ray-
Valor works equally well for PCBs from Cadence databases.=3D20
Bert Simonovich
Signal integrity and Backplane Architecture Nortel
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Ray Anderson
Sent: Friday, April 28, 2006 10:58 AM
To: steven.salkow@xxxxxxxx; si-list@xxxxxxxxxxxxx
Cc: Stuart, Ken; ronald.s.wong@xxxxxxxx; Ray Anderson
Subject: [SI-LIST] Re: Design For Manufacturing assessment Tools for PCB
Designs
Steven-
Have you looked at the Valor DFM tools? See:
http://www.valor.com/SolutionDFM.jsp
I can't comment on this tools use with PCBs but we do make use of it for
Package substrate designs. (runs on Win XP and interfaces well to
Cadence design databases)
-Ray
Raymond Anderson
Senior Signal Integrity Staff Engineer
Product Technology Department
Advanced Package R&D
Xilinx Inc.
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Salkow, Steven
Sent: Thursday, April 27, 2006 6:10 PM
To: si-list@xxxxxxxxxxxxx
Cc: Stuart, Ken; ronald.s.wong@xxxxxxxx
Subject: [SI-LIST] Design For Manufacturing assessment Tools for PCB
Designs
Colleagues:
We have tried Adiva DFM tools here at Lockheed but they are difficult to
use and currently only come in a UNIX version that works poorly with WIN
XP.
I am interesting in hearing from my peers on experiences with different
possibly better tool for validating PCB designs. We do the back end
design with Allegro 15.2
Thanks in advance
Steven Salkow
Lockheed IS&S
3130 Zanker Rd, San Jose
Ca. 94588
(408) 473-4058
steven.salkow@xxxxxxxx
salkow@xxxxxxxxxxxx
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