Howdy, I used Valor for a couple of years, about three years ago when I worked at Jardon Engineering. It worked well and was highly configurable. They also had different configuration files for Valor from some of the places the design might be sent to be built. They were more than happy to send their configuration files and the cooperation saved lead time in meeting their requirements. At my previous employer's, we also attempted the use of a demo of Adiva. It crashed the Win2K computer on several attempts to get it set up. After reformatting and installing the software on a clean machine, Adiva was still not up to snuff so they stuck with Valor. Not sure what they use now. Note that with the proper configuration, Allegro Expert will provide a clean output to Valor. I found this out late in my employment with Jardon and was one of the few designers able to get an error free report from Valor on the first time through with all of my boards after that. I would imagine that Mentor and Pads have the same possibility. I cannot yet say the same about Protel as I have not found the equivalent soldermask and some of the other rules and checks available in Allegro. One of those changes was to have the board outline only in its own gerber file. The fab houses I deal with prefer it this way. I believe that I used the same version of Valor that John mentioned and I will always recommend it above Adiva. Best of fortune, and Cheers! Drew ----- Original Message ----- From: John Koehne To: lambert@xxxxxxxxxx ; ray.anderson@xxxxxxxxxx ; steven.salkow@xxxxxxxx ; si-list@xxxxxxxxxxxxx Cc: Stuart, Ken ; ronald.s.wong@xxxxxxxx Sent: Friday, April 28, 2006 11:14 AM Subject: [SI-LIST] Re: Design For Manufacturing assessment Tools for PCB Designs Steven - We have used the Valor Enterprise 3000 software for several years to verify hundreds of design done using Cadence Allegro layout tools. You can verify the allegro board database as well as input gerber files and compare them to IPC net lists. It works best if you get a consultant to help w/ script automation & design rule checks to streamline checking time. If you would like additional info, feel free to contact me offline.=20 Thanks,John John Koehne Cadpros PCB Design, Inc. 256 Gibraltar Drive, Suite 101 Sunnyvale, CA 94089 PH# 408-734-9600 x10 FX# 408-734-9605 john@xxxxxxxxxxx -----Original Message----- From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Bert Simonovich Sent: Friday, April 28, 2006 9:25 AM To: ray.anderson@xxxxxxxxxx; steven.salkow@xxxxxxxx; si-list@xxxxxxxxxxxxx Cc: Stuart, Ken; ronald.s.wong@xxxxxxxx Subject: [SI-LIST] Re: Design For Manufacturing assessment Tools for PCB Designs Ray- Valor works equally well for PCBs from Cadence databases.=3D20 Bert Simonovich Signal integrity and Backplane Architecture Nortel -----Original Message----- From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Ray Anderson Sent: Friday, April 28, 2006 10:58 AM To: steven.salkow@xxxxxxxx; si-list@xxxxxxxxxxxxx Cc: Stuart, Ken; ronald.s.wong@xxxxxxxx; Ray Anderson Subject: [SI-LIST] Re: Design For Manufacturing assessment Tools for PCB Designs Steven- Have you looked at the Valor DFM tools? See: http://www.valor.com/SolutionDFM.jsp I can't comment on this tools use with PCBs but we do make use of it for Package substrate designs. (runs on Win XP and interfaces well to Cadence design databases) -Ray Raymond Anderson Senior Signal Integrity Staff Engineer Product Technology Department Advanced Package R&D Xilinx Inc. -----Original Message----- From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Salkow, Steven Sent: Thursday, April 27, 2006 6:10 PM To: si-list@xxxxxxxxxxxxx Cc: Stuart, Ken; ronald.s.wong@xxxxxxxx Subject: [SI-LIST] Design For Manufacturing assessment Tools for PCB Designs Colleagues: We have tried Adiva DFM tools here at Lockheed but they are difficult to use and currently only come in a UNIX version that works poorly with WIN XP. I am interesting in hearing from my peers on experiences with different possibly better tool for validating PCB designs. We do the back end design with Allegro 15.2 Thanks in advance Steven Salkow Lockheed IS&S 3130 Zanker Rd, San Jose Ca. 94588 (408) 473-4058 steven.salkow@xxxxxxxx salkow@xxxxxxxxxxxx ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu